From: Andre Przywara <andre.przywara@arm.com>
To: Sam Edwards <cfsworks@gmail.com>
Cc: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
Samuel Holland <samuel@sholland.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Icenowy Zheng <uwu@icenowy.me>,
Maksim Kiselev <bigunclemax@gmail.com>
Subject: Re: [PATCH v2 5/5] HACK: sunxi: psci: be compatible with v1 of R528 patchset
Date: Wed, 27 Sep 2023 17:32:21 +0100 [thread overview]
Message-ID: <20230927173221.122c8de2@donnerap.manchester.arm.com> (raw)
In-Reply-To: <20230816173420.83232-6-CFSworks@gmail.com>
On Wed, 16 Aug 2023 10:34:20 -0700
Sam Edwards <cfsworks@gmail.com> wrote:
Hi Sam,
> This is a hack for reviewer QoL. It is not being submitted for mainline
> inclusion.
> ---
> arch/arm/cpu/armv7/sunxi/psci.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
> index b4ce4f6def..27bac291d5 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.c
> +++ b/arch/arm/cpu/armv7/sunxi/psci.c
> @@ -60,6 +60,18 @@
>
> #define SUN8I_R528_C0_STATUS_STANDBYWFI (16)
>
> +/* 3 hacks for compatibility across v1/v2 of Andre's R528 support series */
> +#ifndef SUNXI_R_CPUCFG_BASE
> +#define SUNXI_R_CPUCFG_BASE 0
> +#endif
Mmh, I didn't find a better solution than keeping this in.
> +#ifndef SUNXI_PRCM_BASE
> +#define SUNXI_PRCM_BASE 0
So this is now handled. As Samuel pointed out, the R329 (another member of
the "NCAT2" family), actually documents a PRCM block, and arguably the
T113s/D1 have that as well, it's just not very useful (at least for
U-Boot), so we didn't need it so far. I just put the address documented in
the R329 manual into cpu_sunxi_ncat2.h, so the symbol expands properly.
> +#endif
> +#if defined(SUNXI_CPUX_BASE) && defined(SUNXI_CPUCFG_BASE)
> +#undef SUNXI_CPUCFG_BASE
> +#define SUNXI_CPUCFG_BASE SUNXI_CPUX_BASE
So what's the story with this? Do we name this differently
(SUNXI_CPUX_BASE) because the IP block is different from the other SoCs?
Or is there another SUNXI_CPUCFG IP block on the R528/T113s SoCs?
If not, I think we should use the SUNXI_CPUCFG_BASE name directly in
cpu_sunxi_ncat2.h, as we never claimed that same names for some MMIO
address blocks means they are compatible.
Please let me know if I miss something.
Cheers,
Andre
> +#endif
> +
> static void __secure cp15_write_cntp_tval(u32 tval)
> {
> asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval));
next prev parent reply other threads:[~2023-09-27 16:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-16 17:34 [PATCH v2 0/5] Allwinner R528/T113s PSCI Sam Edwards
2023-08-16 17:34 ` [PATCH v2 1/5] sunxi: psci: clean away preprocessor macros Sam Edwards
2023-08-18 14:11 ` Andre Przywara
2023-08-18 17:40 ` Sam Edwards
2023-08-18 21:17 ` Sam Edwards
2023-09-27 16:34 ` Andre Przywara
2023-09-27 23:32 ` Sam Edwards
2023-08-16 17:34 ` [PATCH v2 2/5] sunxi: psci: refactor register access to separate functions Sam Edwards
2023-08-18 14:57 ` Andre Przywara
2023-08-18 17:32 ` Sam Edwards
2023-08-16 17:34 ` [PATCH v2 3/5] sunxi: psci: stop modeling register layout with C structs Sam Edwards
2023-08-16 17:34 ` [PATCH v2 4/5] sunxi: psci: implement PSCI on R528 Sam Edwards
2023-09-27 16:31 ` Andre Przywara
2023-09-28 0:01 ` Sam Edwards
2023-09-28 0:35 ` Andre Przywara
2023-08-16 17:34 ` [PATCH v2 5/5] HACK: sunxi: psci: be compatible with v1 of R528 patchset Sam Edwards
2023-09-27 16:32 ` Andre Przywara [this message]
2023-09-27 23:28 ` Sam Edwards
2023-09-28 0:35 ` Andre Przywara
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