* [PATCH 0/2] arm: mvebu: clearfog: support additional ddr @ 2023-10-08 14:58 Josua Mayer 2023-10-08 14:58 ` [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data Josua Mayer 2023-10-08 14:58 ` [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom Josua Mayer 0 siblings, 2 replies; 7+ messages in thread From: Josua Mayer @ 2023-10-08 14:58 UTC (permalink / raw) To: u-boot; +Cc: sr, Josua Mayer This series adds support for additional memory configuration that were been produced in the past - most notably a dual-channel configuration with two 512MB modules. Josua Mayer (2): arm: mvebu: clearfog: read number of ddr channels from tlv data arm: mvebu: clearfog: support 512MB memory size from tlv eeprom board/solidrun/clearfog/clearfog.c | 17 ++++++++++++++++- board/solidrun/common/tlv_data.c | 7 ++++++- board/solidrun/common/tlv_data.h | 1 + 3 files changed, 23 insertions(+), 2 deletions(-) -- 2.35.3 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data 2023-10-08 14:58 [PATCH 0/2] arm: mvebu: clearfog: support additional ddr Josua Mayer @ 2023-10-08 14:58 ` Josua Mayer 2023-10-16 9:00 ` Stefan Roese 2023-10-08 14:58 ` [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom Josua Mayer 1 sibling, 1 reply; 7+ messages in thread From: Josua Mayer @ 2023-10-08 14:58 UTC (permalink / raw) To: u-boot; +Cc: sr, Josua Mayer Extend the existing tlv vendor extension used for ram size by one byte to also store the number of ddr channels. The length of the tlv entry can indicate whether the new information is present. If not default to single channel. Signed-off-by: Josua Mayer <josua@solid-run.com> --- board/solidrun/clearfog/clearfog.c | 14 +++++++++++++- board/solidrun/common/tlv_data.c | 7 ++++++- board/solidrun/common/tlv_data.h | 1 + 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 6edb4221551..4f4532b537e 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -36,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARD_GPP_POL_LOW 0x0 #define BOARD_GPP_POL_MID 0x0 -static struct tlv_data cf_tlv_data; +static struct tlv_data cf_tlv_data = { 0 }; static void cf_read_tlv_data(void) { @@ -168,6 +168,18 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) break; } + switch (cf_tlv_data.ram_channels) { + default: + case 1: + for (uint8_t i = 0; i < 5; i++) + ifp->as_bus_params[i].cs_bitmask = 0x1; + break; + case 2: + for (uint8_t i = 0; i < 5; i++) + ifp->as_bus_params[i].cs_bitmask = 0x3; + break; + } + /* Return the board topology as defined in the board code */ return &board_topology_map; } diff --git a/board/solidrun/common/tlv_data.c b/board/solidrun/common/tlv_data.c index 11d6e4a1380..cf5824886c3 100644 --- a/board/solidrun/common/tlv_data.c +++ b/board/solidrun/common/tlv_data.c @@ -45,9 +45,14 @@ static void parse_tlv_vendor_ext(struct tlvinfo_tlv *tlv_entry, if (val[4] != SR_TLV_CODE_RAM_SIZE) return; - if (tlv_entry->length != 6) + if (tlv_entry->length < 6) return; td->ram_size = val[5]; + + /* extension with additional data field for number of ddr channels */ + if (tlv_entry->length >= 7) { + td->ram_channels = val[6]; + } } static void parse_tlv_data(u8 *eeprom, struct tlvinfo_header *hdr, diff --git a/board/solidrun/common/tlv_data.h b/board/solidrun/common/tlv_data.h index a1432e4b8e1..be3f782ac4a 100644 --- a/board/solidrun/common/tlv_data.h +++ b/board/solidrun/common/tlv_data.h @@ -10,6 +10,7 @@ struct tlv_data { /* Store product name of both SOM and carrier */ char tlv_product_name[2][32]; unsigned int ram_size; + uint8_t ram_channels; }; void read_tlv_data(struct tlv_data *td); -- 2.35.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data 2023-10-08 14:58 ` [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data Josua Mayer @ 2023-10-16 9:00 ` Stefan Roese 2023-10-16 14:44 ` Stefan Roese 0 siblings, 1 reply; 7+ messages in thread From: Stefan Roese @ 2023-10-16 9:00 UTC (permalink / raw) To: Josua Mayer, u-boot On 10/8/23 16:58, Josua Mayer wrote: > Extend the existing tlv vendor extension used for ram size by one byte to > also store the number of ddr channels. > The length of the tlv entry can indicate whether the new information is > present. If not default to single channel. > > Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan > --- > board/solidrun/clearfog/clearfog.c | 14 +++++++++++++- > board/solidrun/common/tlv_data.c | 7 ++++++- > board/solidrun/common/tlv_data.h | 1 + > 3 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c > index 6edb4221551..4f4532b537e 100644 > --- a/board/solidrun/clearfog/clearfog.c > +++ b/board/solidrun/clearfog/clearfog.c > @@ -36,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; > #define BOARD_GPP_POL_LOW 0x0 > #define BOARD_GPP_POL_MID 0x0 > > -static struct tlv_data cf_tlv_data; > +static struct tlv_data cf_tlv_data = { 0 }; > > static void cf_read_tlv_data(void) > { > @@ -168,6 +168,18 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) > break; > } > > + switch (cf_tlv_data.ram_channels) { > + default: > + case 1: > + for (uint8_t i = 0; i < 5; i++) > + ifp->as_bus_params[i].cs_bitmask = 0x1; > + break; > + case 2: > + for (uint8_t i = 0; i < 5; i++) > + ifp->as_bus_params[i].cs_bitmask = 0x3; > + break; > + } > + > /* Return the board topology as defined in the board code */ > return &board_topology_map; > } > diff --git a/board/solidrun/common/tlv_data.c b/board/solidrun/common/tlv_data.c > index 11d6e4a1380..cf5824886c3 100644 > --- a/board/solidrun/common/tlv_data.c > +++ b/board/solidrun/common/tlv_data.c > @@ -45,9 +45,14 @@ static void parse_tlv_vendor_ext(struct tlvinfo_tlv *tlv_entry, > > if (val[4] != SR_TLV_CODE_RAM_SIZE) > return; > - if (tlv_entry->length != 6) > + if (tlv_entry->length < 6) > return; > td->ram_size = val[5]; > + > + /* extension with additional data field for number of ddr channels */ > + if (tlv_entry->length >= 7) { > + td->ram_channels = val[6]; > + } > } > > static void parse_tlv_data(u8 *eeprom, struct tlvinfo_header *hdr, > diff --git a/board/solidrun/common/tlv_data.h b/board/solidrun/common/tlv_data.h > index a1432e4b8e1..be3f782ac4a 100644 > --- a/board/solidrun/common/tlv_data.h > +++ b/board/solidrun/common/tlv_data.h > @@ -10,6 +10,7 @@ struct tlv_data { > /* Store product name of both SOM and carrier */ > char tlv_product_name[2][32]; > unsigned int ram_size; > + uint8_t ram_channels; > }; > > void read_tlv_data(struct tlv_data *td); Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data 2023-10-16 9:00 ` Stefan Roese @ 2023-10-16 14:44 ` Stefan Roese 0 siblings, 0 replies; 7+ messages in thread From: Stefan Roese @ 2023-10-16 14:44 UTC (permalink / raw) To: Josua Mayer, u-boot On 10/16/23 11:00, Stefan Roese wrote: > On 10/8/23 16:58, Josua Mayer wrote: >> Extend the existing tlv vendor extension used for ram size by one byte to >> also store the number of ddr channels. >> The length of the tlv entry can indicate whether the new information is >> present. If not default to single channel. >> >> Signed-off-by: Josua Mayer <josua@solid-run.com> > > Reviewed-by: Stefan Roese <sr@denx.de> Applied to u-boot-marvell/master Thanks, Stefan > Thanks, > Stefan > >> --- >> board/solidrun/clearfog/clearfog.c | 14 +++++++++++++- >> board/solidrun/common/tlv_data.c | 7 ++++++- >> board/solidrun/common/tlv_data.h | 1 + >> 3 files changed, 20 insertions(+), 2 deletions(-) >> >> diff --git a/board/solidrun/clearfog/clearfog.c >> b/board/solidrun/clearfog/clearfog.c >> index 6edb4221551..4f4532b537e 100644 >> --- a/board/solidrun/clearfog/clearfog.c >> +++ b/board/solidrun/clearfog/clearfog.c >> @@ -36,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; >> #define BOARD_GPP_POL_LOW 0x0 >> #define BOARD_GPP_POL_MID 0x0 >> -static struct tlv_data cf_tlv_data; >> +static struct tlv_data cf_tlv_data = { 0 }; >> static void cf_read_tlv_data(void) >> { >> @@ -168,6 +168,18 @@ struct mv_ddr_topology_map >> *mv_ddr_topology_map_get(void) >> break; >> } >> + switch (cf_tlv_data.ram_channels) { >> + default: >> + case 1: >> + for (uint8_t i = 0; i < 5; i++) >> + ifp->as_bus_params[i].cs_bitmask = 0x1; >> + break; >> + case 2: >> + for (uint8_t i = 0; i < 5; i++) >> + ifp->as_bus_params[i].cs_bitmask = 0x3; >> + break; >> + } >> + >> /* Return the board topology as defined in the board code */ >> return &board_topology_map; >> } >> diff --git a/board/solidrun/common/tlv_data.c >> b/board/solidrun/common/tlv_data.c >> index 11d6e4a1380..cf5824886c3 100644 >> --- a/board/solidrun/common/tlv_data.c >> +++ b/board/solidrun/common/tlv_data.c >> @@ -45,9 +45,14 @@ static void parse_tlv_vendor_ext(struct tlvinfo_tlv >> *tlv_entry, >> if (val[4] != SR_TLV_CODE_RAM_SIZE) >> return; >> - if (tlv_entry->length != 6) >> + if (tlv_entry->length < 6) >> return; >> td->ram_size = val[5]; >> + >> + /* extension with additional data field for number of ddr >> channels */ >> + if (tlv_entry->length >= 7) { >> + td->ram_channels = val[6]; >> + } >> } >> static void parse_tlv_data(u8 *eeprom, struct tlvinfo_header *hdr, >> diff --git a/board/solidrun/common/tlv_data.h >> b/board/solidrun/common/tlv_data.h >> index a1432e4b8e1..be3f782ac4a 100644 >> --- a/board/solidrun/common/tlv_data.h >> +++ b/board/solidrun/common/tlv_data.h >> @@ -10,6 +10,7 @@ struct tlv_data { >> /* Store product name of both SOM and carrier */ >> char tlv_product_name[2][32]; >> unsigned int ram_size; >> + uint8_t ram_channels; >> }; >> void read_tlv_data(struct tlv_data *td); > > Viele Grüße, > Stefan Roese > Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom 2023-10-08 14:58 [PATCH 0/2] arm: mvebu: clearfog: support additional ddr Josua Mayer 2023-10-08 14:58 ` [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data Josua Mayer @ 2023-10-08 14:58 ` Josua Mayer 2023-10-16 9:01 ` Stefan Roese 1 sibling, 1 reply; 7+ messages in thread From: Josua Mayer @ 2023-10-08 14:58 UTC (permalink / raw) To: u-boot; +Cc: sr, Josua Mayer Handle 2GBit memory size value "2" from tlv eeprom on ddr initialisation, to support SoMs with 512MB ddr memory. Signed-off-by: Josua Mayer <josua@solid-run.com> --- board/solidrun/clearfog/clearfog.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 4f4532b537e..6fa2fe5fe3e 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -159,6 +159,9 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) cf_read_tlv_data(); switch (cf_tlv_data.ram_size) { + case 2: + ifp->memory_size = MV_DDR_DIE_CAP_2GBIT; + break; case 4: default: ifp->memory_size = MV_DDR_DIE_CAP_4GBIT; -- 2.35.3 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom 2023-10-08 14:58 ` [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom Josua Mayer @ 2023-10-16 9:01 ` Stefan Roese 2023-10-16 14:45 ` Stefan Roese 0 siblings, 1 reply; 7+ messages in thread From: Stefan Roese @ 2023-10-16 9:01 UTC (permalink / raw) To: Josua Mayer, u-boot On 10/8/23 16:58, Josua Mayer wrote: > Handle 2GBit memory size value "2" from tlv eeprom on ddr > initialisation, to support SoMs with 512MB ddr memory. > > Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan > --- > board/solidrun/clearfog/clearfog.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c > index 4f4532b537e..6fa2fe5fe3e 100644 > --- a/board/solidrun/clearfog/clearfog.c > +++ b/board/solidrun/clearfog/clearfog.c > @@ -159,6 +159,9 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) > cf_read_tlv_data(); > > switch (cf_tlv_data.ram_size) { > + case 2: > + ifp->memory_size = MV_DDR_DIE_CAP_2GBIT; > + break; > case 4: > default: > ifp->memory_size = MV_DDR_DIE_CAP_4GBIT; Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom 2023-10-16 9:01 ` Stefan Roese @ 2023-10-16 14:45 ` Stefan Roese 0 siblings, 0 replies; 7+ messages in thread From: Stefan Roese @ 2023-10-16 14:45 UTC (permalink / raw) To: Josua Mayer, u-boot On 10/16/23 11:01, Stefan Roese wrote: > On 10/8/23 16:58, Josua Mayer wrote: >> Handle 2GBit memory size value "2" from tlv eeprom on ddr >> initialisation, to support SoMs with 512MB ddr memory. >> >> Signed-off-by: Josua Mayer <josua@solid-run.com> > > Reviewed-by: Stefan Roese <sr@denx.de> Applied to u-boot-marvell/master Thanks, Stefan > Thanks, > Stefan > >> --- >> board/solidrun/clearfog/clearfog.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/board/solidrun/clearfog/clearfog.c >> b/board/solidrun/clearfog/clearfog.c >> index 4f4532b537e..6fa2fe5fe3e 100644 >> --- a/board/solidrun/clearfog/clearfog.c >> +++ b/board/solidrun/clearfog/clearfog.c >> @@ -159,6 +159,9 @@ struct mv_ddr_topology_map >> *mv_ddr_topology_map_get(void) >> cf_read_tlv_data(); >> switch (cf_tlv_data.ram_size) { >> + case 2: >> + ifp->memory_size = MV_DDR_DIE_CAP_2GBIT; >> + break; >> case 4: >> default: >> ifp->memory_size = MV_DDR_DIE_CAP_4GBIT; > > Viele Grüße, > Stefan Roese > Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-10-16 14:45 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-10-08 14:58 [PATCH 0/2] arm: mvebu: clearfog: support additional ddr Josua Mayer 2023-10-08 14:58 ` [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from tlv data Josua Mayer 2023-10-16 9:00 ` Stefan Roese 2023-10-16 14:44 ` Stefan Roese 2023-10-08 14:58 ` [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv eeprom Josua Mayer 2023-10-16 9:01 ` Stefan Roese 2023-10-16 14:45 ` Stefan Roese
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