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From: sbabic@denx.de
To: Andrejs Cainikovs <andrejs.cainikovs@gmail.com>,u-boot@lists.denx.de
Subject: [PATCH v1] board: toradex: verdin-imx8mm: set fixed LPDDR4 refresh rate as per errata ERR050805
Date: Mon, 16 Oct 2023 11:23:19 +0200 (CEST)	[thread overview]
Message-ID: <20231016092322.166F686EE0@phobos.denx.de> (raw)
In-Reply-To: <20230928143933.11510-1-andrejs.cainikovs@gmail.com>

> From: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> Update lpddr4 configuration and training using updated spreadsheet and
> tools from NXP using data from previous spreadsheet and verified
> toward datasheet:
> - MX8M_Mini_LPDDR4_RPA_v22.xlsx
> - mscale_ddr_tool_v3.31_setup.exe
> The most relevant update is related to errata ERR050805:
> "DRAM: Controller automatic derating logic may not work when
> the LPDDR4 memory temperature is above 85 °C at initialization"
> Other relevant fixes:
> - DRAMTMG7 register: corrected calculation of T_CKPDX parameter
>   (equal to tCKCKEH for LPDDR4)
> - RANKCTL register: corrected calculations for ODTLon and ODTLoff
>   to follow the JEDEC specification
> - ADDRMAP7 register: added support for 17-row devices
> As per errata ERR050805:
> An issue exists with the automatic derating logic of the DDR
> controller that only samples the LPDDR4 MR4 register when the
> Temperature Update Flag (TUF) field (MR4[7] ) is 1’b1. If the
> LPDDR4 memory is initialized and starts operation above 85 °C
> (MR4[2:0] > 3’b011), the MR4 Temperature Update Flag (TUF) will
> not be set. The DDR Controller will therefore not automatically
> adjust the memory refresh rate or de-rate memory timings based
> on the LPDDR4 memory temperature. This may cause the controller
> incorrectly setting the refresh period, potentially cause the
> LPDDR4 memory losing data contents and lead to possible data
> integrity issues above 85 °C.
> Errata provides three possible workaround options, while option 2
> is the most reasonable:
> Disable the automatic derating logic of the DDR controller and
> apply fixed x2 refresh rate (0.5x refresh). This option is
> suitable for designs that are expected to boot at or above 85 °C
> and memory’s MR4[2:0] (Refresh Rate) DOES NOT report the following
> conditions:
> 3b101: 0.25x refresh, no de-rating
> 3b110: 0.25x refresh, with de-rating
> 3b111: SDRAM High temperature operating limit exceeded
> [1]: https://www.nxp.com/docs/en/errata/IMX8MM_0N87W.pdf
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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      parent reply	other threads:[~2023-10-16  9:30 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-28 14:39 [PATCH v1] board: toradex: verdin-imx8mm: set fixed LPDDR4 refresh rate as per errata ERR050805 Andrejs Cainikovs
2023-09-28 14:55 ` Marcel Ziswiler
2023-10-07 17:26 ` Fabio Estevam
2023-10-16  9:23 ` sbabic [this message]

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