From: Andre Przywara <andre.przywara@arm.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>,
Icenowy Zheng <uwu@icenowy.me>,
Maxim Kiselev <bigunclemax@gmail.com>,
Sam Edwards <cfsworks@gmail.com>,
Okhunjon Sobirjonov <okhunjon72@gmail.com>,
linux-sunxi@lists.linux.dev, andre.przywara@foss.arm.com,
Jagan Teki <jagan@amarulasolutions.com>,
u-boot@lists.denx.de
Subject: Re: [PATCH v2 01/22] sunxi: remove CONFIG_SATAPWR
Date: Sun, 22 Oct 2023 00:27:59 +0100 [thread overview]
Message-ID: <20231022002759.1608c5c3@slackpad.lan> (raw)
In-Reply-To: <9ee155e3-7bd0-ed70-b4b7-33f4760a507c@sholland.org>
On Thu, 19 Oct 2023 18:51:30 -0500
Samuel Holland <samuel@sholland.org> wrote:
Hi Samuel,
thanks for having a look!
> On 9/28/23 16:54, Andre Przywara wrote:
> > The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
> > enables the power for a SATA harddisk.
> > In the DT this is described with the target-supply property in the AHCI
> > DT node, pointing to a (GPIO controlled) regulator. Since we need SATA
> > only in U-Boot proper, and use a DM driver for AHCI there, we should use
> > the DT instead of hardcoding this.
> >
> > Add code to the sunxi AHCI driver to check the DT for that regulator and
> > enable it, at probe time. Then drop the current code from board.c, which
> > was doing that job before.
> > This allows us to remove the SATAPWR Kconfig definition and the
> > respective values from the defconfigs.
> > We also select the generic fixed regulator driver, which handles those
> > GPIO controlled regulators.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > Reviewed-by: Sam Edwards <CFSworks@gmail.com>
> > ---
> > arch/arm/Kconfig | 2 ++
> > arch/arm/mach-sunxi/Kconfig | 8 --------
> > board/sunxi/board.c | 16 +---------------
> > configs/A10-OLinuXino-Lime_defconfig | 1 -
> > configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 -
> > configs/A20-OLinuXino-Lime2_defconfig | 1 -
> > configs/A20-OLinuXino-Lime_defconfig | 1 -
> > configs/A20-OLinuXino_MICRO-eMMC_defconfig | 1 -
> > configs/A20-OLinuXino_MICRO_defconfig | 1 -
> > configs/A20-Olimex-SOM-EVB_defconfig | 1 -
> > configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 1 -
> > configs/A20-Olimex-SOM204-EVB_defconfig | 1 -
> > configs/Cubieboard2_defconfig | 1 -
> > configs/Cubieboard_defconfig | 1 -
> > configs/Cubietruck_defconfig | 1 -
> > configs/Itead_Ibox_A20_defconfig | 1 -
> > configs/Lamobo_R1_defconfig | 1 -
> > configs/Linksprite_pcDuino3_Nano_defconfig | 1 -
> > configs/Linksprite_pcDuino3_defconfig | 1 -
> > configs/Sinovoip_BPI_M3_defconfig | 1 -
> > configs/orangepi_plus_defconfig | 2 +-
> > drivers/ata/ahci_sunxi.c | 9 +++++++++
> > 22 files changed, 13 insertions(+), 41 deletions(-)
> >
> > [...]
> > diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
> > index 76de72aa228..ed585881d49 100644
> > --- a/configs/orangepi_plus_defconfig
> > +++ b/configs/orangepi_plus_defconfig
> > @@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=672
> > CONFIG_MACPWR="PD6"
> > CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> > CONFIG_USB1_VBUS_PIN="PG13"
> > -CONFIG_SATAPWR="PG11"
> > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> > CONFIG_SPL_I2C=y
> > CONFIG_SPL_SYS_I2C_LEGACY=y
> > @@ -16,3 +15,4 @@ CONFIG_SUN8I_EMAC=y
> > CONFIG_SY8106A_POWER=y
> > CONFIG_USB_EHCI_HCD=y
> > CONFIG_USB_OHCI_HCD=y
> > +CONFIG_USB3_VBUS_PIN="PG11"
>
> This change is unrelated to the purpose of this commit.
I added this line after your suggestion last December:
https://lore.kernel.org/u-boot/bb2ef69f-23e1-9936-e824-6b86924b9c8a@sholland.org/
In short: this is an H3 board without native SATA, so having this
symbol set here enables SATA operation for now, until we get full DT
regulator support in phy-sun4i-usb.c.
Cheers,
Andre
next prev parent reply other threads:[~2023-10-21 23:29 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-28 21:54 [PATCH v2 00/22] sunxi: Allwinner T113s support Andre Przywara
2023-09-28 21:54 ` [PATCH v2 01/22] sunxi: remove CONFIG_SATAPWR Andre Przywara
2023-10-19 23:51 ` Samuel Holland
2023-10-21 23:27 ` Andre Przywara [this message]
2023-10-22 3:34 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 02/22] net: sunxi_emac: chase DT nodes to find PHY regulator Andre Przywara
2023-10-20 0:01 ` Samuel Holland
2023-10-21 23:33 ` Andre Przywara
2023-09-28 21:54 ` [PATCH v2 03/22] sunxi: remove CONFIG_MACPWR Andre Przywara
2023-10-21 4:35 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 04/22] pinctrl: sunxi: move pinctrl code Andre Przywara
2023-10-19 0:18 ` Andre Przywara
2023-10-21 8:21 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 05/22] pinctrl: sunxi: add GPIO in/out wrappers Andre Przywara
2023-10-21 8:30 ` Samuel Holland
2023-10-21 23:46 ` Andre Przywara
2023-09-28 21:54 ` [PATCH v2 06/22] pinctrl: sunxi: remove struct sunxi_gpio Andre Przywara
2023-10-21 8:37 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 07/22] pinctrl: sunxi: remove GPIO_EXTRA_HEADER Andre Przywara
2023-10-21 8:57 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 08/22] pinctrl: sunxi: move PIO_BASE into sunxi_gpio.h Andre Przywara
2023-09-28 21:54 ` [PATCH v2 09/22] pinctrl: sunxi: add new D1 pinctrl support Andre Przywara
2023-10-22 3:31 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 10/22] sunxi: introduce NCAT2 generation model Andre Przywara
2023-10-22 3:40 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 11/22] pinctrl: sunxi: add Allwinner D1 pinctrl description Andre Przywara
2023-10-21 4:34 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 12/22] clk: sunxi: Add support for the D1 CCU Andre Przywara
2023-10-19 23:53 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 13/22] sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup Andre Przywara
2023-09-28 21:54 ` [PATCH v2 14/22] sunxi: clock: support D1/R528 PLL6 clock Andre Przywara
2023-09-28 21:54 ` [PATCH v2 15/22] Kconfig: sunxi: prepare for using drivers/ram/sunxi Andre Przywara
2023-10-22 3:44 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 16/22] sunxi: add R528/T113-s3/D1(s) DRAM initialisation code Andre Przywara
2023-10-22 3:52 ` Samuel Holland
2023-10-22 22:40 ` Andre Przywara
2023-10-23 2:58 ` Samuel Holland
2023-09-28 21:54 ` [PATCH v2 17/22] sunxi: add Allwinner R528/T113 SoC support Andre Przywara
2023-09-28 21:54 ` [PATCH v2 18/22] sunxi: R528: add SMHC2 pin pull ups support Andre Przywara
2023-09-28 21:54 ` [PATCH v2 19/22] sunxi: refactor serial base addresses to avoid asm/arch/cpu.h Andre Przywara
2023-09-28 21:54 ` [PATCH v2 20/22] riscv: dts: allwinner: Add the D1/D1s SoC devicetree Andre Przywara
2023-09-28 21:54 ` [PATCH v2 21/22] ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi Andre Przywara
2023-09-28 21:54 ` [PATCH v2 22/22] sunxi: add MangoPi MQ-R board support Andre Przywara
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231022002759.1608c5c3@slackpad.lan \
--to=andre.przywara@arm.com \
--cc=andre.przywara@foss.arm.com \
--cc=bigunclemax@gmail.com \
--cc=cfsworks@gmail.com \
--cc=jagan@amarulasolutions.com \
--cc=jernej.skrabec@gmail.com \
--cc=linux-sunxi@lists.linux.dev \
--cc=okhunjon72@gmail.com \
--cc=samuel@sholland.org \
--cc=u-boot@lists.denx.de \
--cc=uwu@icenowy.me \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox