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From: Tom Rini <trini@konsulko.com>
To: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
	Simon Glass <sjg@chromium.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Xiang W <merlew4n6@gmail.com>,
	Chanho Park <chanho61.park@samsung.com>,
	Sughosh Ganu <sughosh.ganu@linaro.org>,
	u-boot@lists.denx.de, Peter Hoyes <Peter.Hoyes@arm.com>,
	Alexey Romanov <avromanov@salutedevices.com>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	palmer@dabbelt.com
Subject: Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension
Date: Wed, 8 Nov 2023 09:37:35 -0500	[thread overview]
Message-ID: <20231108143735.GO6601@bill-the-cat> (raw)
In-Reply-To: <91ae75c2-a0d7-4835-8306-777c4d9afdd9@canonical.com>

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On Wed, Nov 08, 2023 at 06:23:37AM -0800, Heinrich Schuchardt wrote:
> On 11/7/23 16:34, Tom Rini wrote:
> > On Wed, Nov 08, 2023 at 12:29:03AM +0000, Conor Dooley wrote:
> > > On Tue, Nov 07, 2023 at 06:23:05PM -0500, Tom Rini wrote:
> > [snip]
> > > > Thanks. Setting aside Simon's follow-up, this is what I was looking for.
> > > > We might have to wait for Heinrich to return from the conference to have
> > > > time to look at how to utilize the above and see what we can do from
> > > > there.
> > > 
> > > I did read that, but I don't think most of it is relevant to the binding
> > > itself. His five things were:
> > > | - U-Boot models hardware (and other things) as devices in driver model [1]
> > > 
> > > This I think should be satisfied. The Zkr CSR is a property of the CPU,
> > > and shouldn't have its own DT node IMO. Is it problematic for U-Boot to
> > > populate multiple devices for its driver model based on one DT node?
> 
> Devices in U-Boot are bound on the basis of a compatible string. All RISC-V
> CPU nodes have a compatible string 'riscv' but that does not provide any
> information about the existence of the Zkr extension. That information is in
> the 'riscv,isa-extensions' property of the cpu nodes (see
> Documentation/devicetree/bindings/riscv/cpus.yaml).
> 
> > > I know in Linux that I can create devices using something like
> > > platform_device_register(), does U-Boot have a similar facility?
> 
> This is what the U_BOOT_DRVINFO() macro in my driver does and which Simon
> discourages.

My current thoughts are that in this case we could use U_BOOT_DRVINFO()
like today and then have riscv_zkr_probe() be what checks the
riscv,isa-extensions property for an appropriate match? This would mean
we don't need any new nodes/compatibles/etc, and possibly not need any
bootph- properties added either? I assume we don't need the RNG so early
as for that to be an issue.

-- 
Tom

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  reply	other threads:[~2023-11-08 14:37 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-31 12:55 [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension Heinrich Schuchardt
2023-10-31 12:55 ` [PATCH v3 1/2] riscv: allow resume after exception Heinrich Schuchardt
2023-11-01  8:55   ` Leo Liang
2023-10-31 12:55 ` [PATCH v3 2/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension Heinrich Schuchardt
2023-11-01 17:05 ` [PATCH v3 0/2] " Andre Przywara
2023-11-01 17:16   ` Sean Anderson
2023-11-01 17:49     ` Andre Przywara
2023-11-01 18:20       ` Sean Anderson
2023-11-01 20:20   ` Heinrich Schuchardt
2023-11-03 19:38     ` Simon Glass
2023-11-04 17:12       ` Andre Przywara
2023-11-04 19:45         ` Simon Glass
2023-11-04 20:36           ` Heinrich Schuchardt
2023-11-04 22:58             ` Simon Glass
2023-11-06 17:26           ` Andre Przywara
2023-11-06 20:13             ` Tom Rini
2023-11-06 20:38             ` Simon Glass
2023-11-06 20:46               ` Tom Rini
2023-11-07  1:10                 ` Simon Glass
2023-11-07 19:30                   ` Tom Rini
2023-11-07 21:52                     ` Rob Herring
2023-11-07 22:10                       ` Tom Rini
2023-11-07 22:27                         ` Conor Dooley
2023-11-07 22:38                           ` Tom Rini
2023-11-07 22:51                             ` Simon Glass
2023-11-07 23:14                               ` Tom Rini
2023-11-07 23:12                             ` Conor Dooley
2023-11-07 23:23                               ` Tom Rini
2023-11-08  0:29                                 ` Conor Dooley
2023-11-08  0:34                                   ` Tom Rini
2023-11-08 14:23                                     ` Heinrich Schuchardt
2023-11-08 14:37                                       ` Tom Rini [this message]
2023-11-08 15:25                                         ` Heinrich Schuchardt
2023-11-08 16:44                                           ` Tom Rini
2023-11-08 17:10                                             ` Heinrich Schuchardt
2023-11-08 17:38                               ` Palmer Dabbelt
2023-11-10 11:50                                 ` Simon Glass
2023-11-06 21:53               ` Andre Przywara
2023-11-07  1:08                 ` Simon Glass
2023-11-07 11:27                   ` Andre Przywara
2023-11-07 12:22                     ` Simon Glass
2023-11-07 15:12                       ` Andre Przywara
2023-11-07 22:03                         ` Tom Rini
2023-11-08  4:24                         ` Simon Glass
2023-11-08  7:11                           ` Ilias Apalodimas
2023-11-07 21:53                       ` Tom Rini
2023-11-07 21:24                     ` Tom Rini
2023-11-06 16:46         ` Tom Rini
2023-11-06 17:24           ` Simon Glass
2023-11-06 17:45           ` Andre Przywara

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