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[31.10.206.125]) by smtp.gmail.com with ESMTPSA id s14-20020a5d69ce000000b00337478efa4fsm1305849wrw.60.2024.01.17.02.18.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 02:18:09 -0800 (PST) From: Max Krummenacher To: Max Krummenacher Cc: Francesco Dolcini , Emanuele Ghidoli , Heinrich Schuchardt , Marcel Ziswiler , Nishanth Menon , u-boot@lists.denx.de Subject: [PATCH v1 1/4] board: verdin-am62: improve comment on usb phy core voltage Date: Wed, 17 Jan 2024 11:16:46 +0100 Message-ID: <20240117101743.3955852-2-max.oss.09@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240117101743.3955852-1-max.oss.09@gmail.com> References: <20240117101743.3955852-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Max Krummenacher TI recommends to clear the bit independent of the used voltage. So the comment which claims to do it due to the core voltage at 0.85V is bogus. See https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1252724/am625-usb-phy-core-voltage-selection-and-vdda_core_usb-mismatch Signed-off-by: Max Krummenacher --- board/toradex/verdin-am62/verdin-am62.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c index d09dda5bccc..4e912b5f32f 100644 --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c @@ -101,12 +101,13 @@ void spl_board_init(void) { u32 val; - /* Set USB0 PHY core voltage to 0.85V */ + /* Clear USB0_PHY_CTRL_CORE_VOLTAGE */ + /* TI recommends to clear the bit independent of VDDA_CORE_USB */ val = readl(CTRLMMR_USB0_PHY_CTRL); val &= ~(CORE_VOLTAGE); writel(val, CTRLMMR_USB0_PHY_CTRL); - /* Set USB1 PHY core voltage to 0.85V */ + /* Clear USB1_PHY_CTRL_CORE_VOLTAGE */ val = readl(CTRLMMR_USB1_PHY_CTRL); val &= ~(CORE_VOLTAGE); writel(val, CTRLMMR_USB1_PHY_CTRL); -- 2.42.0