[PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21

[PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21

[Jonas Karlman]

Ethernet on a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY
currently fails with the following message:

  Could not get PHY for ethernet@ff540000: addr -1

This happens because the ethernet PHY is never reset before a phy-id is
read back from the MDIO bus.

This series fixes this issue by calling eth_phy_set_mdio_bus() from the
designware ethernet driver to issue a PHY reset before the phy_connect()
call.

With the driver change and DM_ETH_PHY and PHY_REALTEK enabled the PHY
can be identified and etherent works:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

This was tested with and without the DM_MDIO option enabled. Decided to
leave it disabled in this series.

Jonas Karlman (2):
  net: designware: Reset eth phy before phy connect
  rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK

 configs/rock-pi-e-rk3328_defconfig | 2 ++
 drivers/net/designware.c           | 7 +++++++
 2 files changed, 9 insertions(+)

-- 
2.43.0

[PATCH 1/2] net: designware: Reset eth phy before phy connect

[Jonas Karlman]

Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.

  Could not get PHY for ethernet@ff540000: addr -1

Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.

This help fix ethernet on Radxa ROCK Pi E v1.21:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 drivers/net/designware.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index a174344b3ef5..9aa5d8a1409e 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -13,6 +13,7 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <eth_phy.h>
 #include <log.h>
 #include <miiphy.h>
 #include <malloc.h>
@@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 	struct phy_device *phydev;
 	int ret;
 
+	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+		eth_phy_set_mdio_bus(dev, NULL);
+
 #if IS_ENABLED(CONFIG_DM_MDIO)
 	phydev = dm_eth_phy_connect(dev);
 	if (!phydev)
@@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 #else
 	int phy_addr = -1;
 
+	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+		phy_addr = eth_phy_get_addr(dev);
+
 #ifdef CONFIG_PHY_ADDR
 	phy_addr = CONFIG_PHY_ADDR;
 #endif
-- 
2.43.0

Re: [PATCH 1/2] net: designware: Reset eth phy before phy connect

[Kever Yang]

On 2024/1/18 15:19, Jonas Karlman wrote:
> Some ethernet PHY require being reset before a phy-id can be read back
> on the MDIO bus. This can result in the following message being show
> on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.
>
>    Could not get PHY for ethernet@ff540000: addr -1
>
> Add support to designware ethernet driver to reset eth phy by calling
> the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
> as bus parameter to not set a shared mdio bus reference that would be
> freed when probe fails. Also add a eth_phy_get_addr() call to try and
> get the phy addr from DT when DM_MDIO is disabled.
>
> This help fix ethernet on Radxa ROCK Pi E v1.21:
>
>    => mdio list
>    ethernet@ff540000:
>    1 - RealTek RTL8211F <--> ethernet@ff540000
>
> Reported-by: Trevor Woerner <twoerner@gmail.com>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   drivers/net/designware.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index a174344b3ef5..9aa5d8a1409e 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -13,6 +13,7 @@
>   #include <cpu_func.h>
>   #include <dm.h>
>   #include <errno.h>
> +#include <eth_phy.h>
>   #include <log.h>
>   #include <miiphy.h>
>   #include <malloc.h>
> @@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
>   	struct phy_device *phydev;
>   	int ret;
>   
> +	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
> +		eth_phy_set_mdio_bus(dev, NULL);
> +
>   #if IS_ENABLED(CONFIG_DM_MDIO)
>   	phydev = dm_eth_phy_connect(dev);
>   	if (!phydev)
> @@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
>   #else
>   	int phy_addr = -1;
>   
> +	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
> +		phy_addr = eth_phy_get_addr(dev);
> +
>   #ifdef CONFIG_PHY_ADDR
>   	phy_addr = CONFIG_PHY_ADDR;
>   #endif

[PATCH 2/2] rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK

[Jonas Karlman]

Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
during probe.

Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000
  => net list
  eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
  eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
  => dhcp
  Speed: 1000, full duplex
  BOOTP broadcast 1
  BOOTP broadcast 2
  BOOTP broadcast 3
  DHCP client bound to address 192.168.1.114 (1004 ms)

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 configs/rock-pi-e-rk3328_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index c0375beffec3..6dda900a9b42 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -76,6 +76,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
2.43.0

Re: [PATCH 2/2] rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK

[Kever Yang]

On 2024/1/18 15:19, Jonas Karlman wrote:
> Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
> driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
> during probe.
>
> Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:
>
>    => mdio list
>    ethernet@ff540000:
>    1 - RealTek RTL8211F <--> ethernet@ff540000
>    => net list
>    eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
>    eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
>    => dhcp
>    Speed: 1000, full duplex
>    BOOTP broadcast 1
>    BOOTP broadcast 2
>    BOOTP broadcast 3
>    DHCP client bound to address 192.168.1.114 (1004 ms)
>
> Reported-by: Trevor Woerner <twoerner@gmail.com>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   configs/rock-pi-e-rk3328_defconfig | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
> index c0375beffec3..6dda900a9b42 100644
> --- a/configs/rock-pi-e-rk3328_defconfig
> +++ b/configs/rock-pi-e-rk3328_defconfig
> @@ -76,6 +76,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
>   CONFIG_MISC=y
>   CONFIG_MMC_DW=y
>   CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>   CONFIG_ETH_DESIGNWARE=y
>   CONFIG_GMAC_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y

Re: [PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21

[Trevor Woerner]

Hi Jonas,

On Thu 2024-01-18 @ 07:19:44 AM, Jonas Karlman wrote:
> Ethernet on a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY
> currently fails with the following message:
> 
>   Could not get PHY for ethernet@ff540000: addr -1
> 
> This happens because the ethernet PHY is never reset before a phy-id is
> read back from the MDIO bus.
> 
> This series fixes this issue by calling eth_phy_set_mdio_bus() from the
> designware ethernet driver to issue a PHY reset before the phy_connect()
> call.
> 
> With the driver change and DM_ETH_PHY and PHY_REALTEK enabled the PHY
> can be identified and etherent works:
> 
>   => mdio list
>   ethernet@ff540000:
>   1 - RealTek RTL8211F <--> ethernet@ff540000
> 
> This was tested with and without the DM_MDIO option enabled. Decided to
> leave it disabled in this series.

This works great, thank you! As you suspected, both boards/PHYs work fine now
work under Linux (in addition to U-Boot).

Tested-By: Trevor Woerner <twoerner@gmail.com>

> Jonas Karlman (2):
>   net: designware: Reset eth phy before phy connect
>   rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK
> 
>  configs/rock-pi-e-rk3328_defconfig | 2 ++
>  drivers/net/designware.c           | 7 +++++++
>  2 files changed, 9 insertions(+)
> 
> -- 
> 2.43.0
>