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From: Svyatoslav Ryhel <clamor95@gmail.com>
To: "Tom Rini" <trini@konsulko.com>,
	"Anatolij Gustschin" <agust@denx.de>,
	"Simon Glass" <sjg@chromium.org>,
	"Svyatoslav Ryhel" <clamor95@gmail.com>,
	"Anton Bambura" <jenneron@protonmail.com>,
	"Jonas Schwöbel" <jonasschwoebel@yahoo.de>
Cc: u-boot@lists.denx.de
Subject: [PATCH v2 1/7] video: panel: add LG LG070WX3 MIPI DSI panel driver
Date: Wed, 31 Jan 2024 08:57:15 +0200	[thread overview]
Message-ID: <20240131065721.4245-2-clamor95@gmail.com> (raw)
In-Reply-To: <20240131065721.4245-1-clamor95@gmail.com>

The LD070WX3 is a Color Active Matrix Liquid Crystal Display with
an integral Light Emitting Diode (LED) backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It
is a transmissive type display operating in the normally Black
mode. This TFT-LCD has 7.0 inches diagonally measured active
display area with WXGA resolution (800 by 1280 pixel array).

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/video/Kconfig       |   8 ++
 drivers/video/Makefile      |   1 +
 drivers/video/lg-ld070wx3.c | 186 ++++++++++++++++++++++++++++++++++++
 3 files changed, 195 insertions(+)
 create mode 100644 drivers/video/lg-ld070wx3.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e2016d73d1..05567a0095 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -522,6 +522,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
 	Say Y here if you want to enable support for Orise Technology
 	otm8009a 480x800 dsi 2dl panel.
 
+config VIDEO_LCD_LG_LD070WX3
+	bool "LD070WX3 DSI LCD panel support"
+	depends on PANEL && BACKLIGHT
+	select VIDEO_MIPI_DSI
+	help
+	  Say Y here if you want to enable support for LG LD070WX3
+	  800x1280 DSI video mode panel.
+
 config VIDEO_LCD_RAYDIUM_RM68200
 	bool "RM68200 DSI LCD panel support"
 	select VIDEO_MIPI_DSI
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index fdc2937632..bb6d9b74b9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o
 obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_LG_LD070WX3) += lg-ld070wx3.o
 obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
 obj-$(CONFIG_VIDEO_LCD_RENESAS_R61307) += renesas-r61307.o
diff --git a/drivers/video/lg-ld070wx3.c b/drivers/video/lg-ld070wx3.c
new file mode 100644
index 0000000000..610a06ffe7
--- /dev/null
+++ b/drivers/video/lg-ld070wx3.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * LG LD070WX3-SL01 DSI panel driver
+ *
+ * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <backlight.h>
+#include <dm.h>
+#include <panel.h>
+#include <log.h>
+#include <mipi_dsi.h>
+#include <linux/delay.h>
+#include <power/regulator.h>
+
+struct lg_ld070wx3_priv {
+	struct udevice *vdd;
+	struct udevice *vcc;
+
+	struct udevice *backlight;
+};
+
+static struct display_timing default_timing = {
+	.pixelclock.typ		= 70000000,
+	.hactive.typ		= 800,
+	.hfront_porch.typ	= 32,
+	.hback_porch.typ	= 48,
+	.hsync_len.typ		= 8,
+	.vactive.typ		= 1280,
+	.vfront_porch.typ	= 5,
+	.vback_porch.typ	= 3,
+	.vsync_len.typ		= 1,
+};
+
+static void dcs_write_one(struct mipi_dsi_device *dsi, u8 cmd, u8 data)
+{
+	mipi_dsi_dcs_write(dsi, cmd, &data, 1);
+}
+
+static int lg_ld070wx3_enable_backlight(struct udevice *dev)
+{
+	struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+	struct mipi_dsi_device *dsi = plat->device;
+	int ret;
+
+	ret = mipi_dsi_dcs_soft_reset(dsi);
+	if (ret < 0) {
+		log_debug("%s: failed to soft reset panel: %d\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	/* Delay before sending new command after soft reset */
+	mdelay(20);
+
+	/* Differential input impedance selection */
+	dcs_write_one(dsi, 0xAE, 0x0B);
+
+	/* Enter test mode 1 and 2*/
+	dcs_write_one(dsi, 0xEE, 0xEA);
+	dcs_write_one(dsi, 0xEF, 0x5F);
+
+	/* Increased MIPI CLK driving ability */
+	dcs_write_one(dsi, 0xF2, 0x68);
+
+	/* Exit test mode 1 and 2 */
+	dcs_write_one(dsi, 0xEE, 0x00);
+	dcs_write_one(dsi, 0xEF, 0x00);
+
+	return 0;
+}
+
+static int lg_ld070wx3_set_backlight(struct udevice *dev, int percent)
+{
+	struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = backlight_enable(priv->backlight);
+	if (ret)
+		return ret;
+
+	return backlight_set_brightness(priv->backlight, percent);
+}
+
+static int lg_ld070wx3_timings(struct udevice *dev,
+			       struct display_timing *timing)
+{
+	memcpy(timing, &default_timing, sizeof(*timing));
+	return 0;
+}
+
+static int lg_ld070wx3_of_to_plat(struct udevice *dev)
+{
+	struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+					   "backlight", &priv->backlight);
+	if (ret) {
+		log_debug("%s: cannot get backlight: ret = %d\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "vdd-supply", &priv->vdd);
+	if (ret) {
+		log_debug("%s: cannot get vdd-supply: ret = %d\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "vcc-supply", &priv->vcc);
+	if (ret) {
+		log_debug("%s: cannot get vcc-supply: ret = %d\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int lg_ld070wx3_hw_init(struct udevice *dev)
+{
+	struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = regulator_set_enable_if_allowed(priv->vcc, 1);
+	if (ret) {
+		log_debug("%s: enabling vcc-supply failed (%d)\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	ret = regulator_set_enable_if_allowed(priv->vdd, 1);
+	if (ret) {
+		log_debug("%s: enabling vdd-supply failed (%d)\n",
+			  __func__, ret);
+		return ret;
+	}
+
+	/*
+	 * According to spec delay between enabling supply is 0,
+	 * for regulators to reach required voltage ~5ms needed.
+	 * MIPI interface signal for setup requires additional
+	 * 110ms which in total results in 115ms.
+	 */
+	mdelay(115);
+
+	return 0;
+}
+
+static int lg_ld070wx3_probe(struct udevice *dev)
+{
+	struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+
+	/* fill characteristics of DSI data link */
+	plat->lanes = 4;
+	plat->format = MIPI_DSI_FMT_RGB888;
+	plat->mode_flags = MIPI_DSI_MODE_VIDEO;
+
+	return lg_ld070wx3_hw_init(dev);
+}
+
+static const struct panel_ops lg_ld070wx3_ops = {
+	.enable_backlight	= lg_ld070wx3_enable_backlight,
+	.set_backlight		= lg_ld070wx3_set_backlight,
+	.get_display_timing	= lg_ld070wx3_timings,
+};
+
+static const struct udevice_id lg_ld070wx3_ids[] = {
+	{ .compatible = "lg,ld070wx3-sl01" },
+	{ }
+};
+
+U_BOOT_DRIVER(lg_ld070wx3) = {
+	.name		= "lg_ld070wx3",
+	.id		= UCLASS_PANEL,
+	.of_match	= lg_ld070wx3_ids,
+	.ops		= &lg_ld070wx3_ops,
+	.of_to_plat	= lg_ld070wx3_of_to_plat,
+	.probe		= lg_ld070wx3_probe,
+	.plat_auto	= sizeof(struct mipi_dsi_panel_plat),
+	.priv_auto	= sizeof(struct lg_ld070wx3_priv),
+};
-- 
2.40.1


  reply	other threads:[~2024-01-31  6:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-31  6:57 [PATCH v2 0/7] Tegra panel improvements Svyatoslav Ryhel
2024-01-31  6:57 ` Svyatoslav Ryhel [this message]
2024-01-31  6:57 ` [PATCH v2 2/7] video: panel: add Samsung LTL106HL02 MIPI DSI panel driver Svyatoslav Ryhel
2024-01-31  6:57 ` [PATCH v2 3/7] video: bridge: add Toshiba TC358768 RGB to DSI bridge support Svyatoslav Ryhel
2024-01-31  6:57 ` [PATCH v2 4/7] video: bridge: add basic support for the Parade DP501 transmitter Svyatoslav Ryhel
2024-01-31  6:57 ` [PATCH v2 5/7] video: endeavoru-panel: shift the init sequence by one step earlier Svyatoslav Ryhel
2024-01-31  6:57 ` [PATCH v2 6/7] video: bridge: ssd2825: " Svyatoslav Ryhel
2024-01-31  6:57 ` [PATCH v2 7/7] video: renesas: " Svyatoslav Ryhel
2024-04-19 11:29 ` [PATCH v2 0/7] Tegra panel improvements Svyatoslav Ryhel
2024-04-19 14:05   ` Tom Rini
2024-04-20 15:14     ` Anatolij Gustschin
2024-04-20 23:03 ` Anatolij Gustschin

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