[PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Michał Barnaś]

By default, the board requires power cycle (cold boot) to program the
FPGA with bitstream. This change adds Kconfig that allows to enable
reprogramming the FPGA with every boot. This makes the update process
of the bitstream on the filesystem to be applied with simple system
reboot.


Michał Barnaś (2):
  arm: socfpga: arria10: add option to reprogram the FPGA every reboot
  chameleonv3: set in defconfig for FPGA to reprogram every reboot

 arch/arm/mach-socfpga/Kconfig         | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c       | 8 ++++++++
 configs/socfpga_chameleonv3_defconfig | 1 +
 3 files changed, 17 insertions(+)

-- 
2.44.0.rc1.240.g4c46232300-goog

[PATCH 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Michał Barnaś]

Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

 arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 114d243812..89303f1f16 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
 	imply FPGA_SOCFPGA
 	imply SPL_USE_TINY_PRINTF
 
+config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	bool "Always reprogram Arria 10 FPGA"
+	depends on TARGET_SOCFPGA_ARRIA10
+	help
+	  Arria 10 FPGA is only programmed during the cold boot.
+	  This option forces the FPGA to be reprogrammed every reboot,
+	  allowing to change the bitstream and apply it with warm reboot.
+
 config TARGET_SOCFPGA_CYCLONE5
 	bool
 	select TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4a29..d5d3327a42 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -122,7 +122,11 @@ void spl_board_init(void)
 	arch_early_init_r();
 
 	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
+#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	if (is_regular_boot_valid()) {
+#else
 	if (is_fpgamgr_user_mode()) {
+#endif
 		ret = config_pins(gd->fdt_blob, "shared");
 		if (ret)
 			return;
@@ -130,7 +134,11 @@ void spl_board_init(void)
 		ret = config_pins(gd->fdt_blob, "fpga");
 		if (ret)
 			return;
+#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	} else {
+#else
 	} else if (!is_fpgamgr_early_user_mode()) {
+#endif
 		/* Program IOSSM(early IO release) or full FPGA */
 		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
 
-- 
2.44.0.rc1.240.g4c46232300-goog

RE: [PATCH 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Chee, Tien Fong]

> -----Original Message-----
> From: Michał Barnaś <barnas@google.com>
> Sent: Thursday, February 22, 2024 11:21 PM
> To: u-boot@lists.denx.de
> Cc: Michał Barnaś <barnas@google.com>; Dinh Nguyen
> <dinguyen@kernel.org>; Marek Vasut <marex@denx.de>; Simon Glass
> <sjg@chromium.org>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Tom Rini <trini@konsulko.com>
> Subject: [PATCH 1/2] arm: socfpga: arria10: add option to reprogram the
> FPGA every reboot
> 
> Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> This option allows to change the bitstream on the filesystem and apply
> changes with warm reboot without the need for a power cycle.
> 
> Signed-off-by: Michał Barnaś <barnas@google.com>
> ---
> 
>  arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
>  arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> socfpga/Kconfig index 114d243812..89303f1f16 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
>  	imply FPGA_SOCFPGA
>  	imply SPL_USE_TINY_PRINTF
> 
> +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	bool "Always reprogram Arria 10 FPGA"
> +	depends on TARGET_SOCFPGA_ARRIA10
> +	help
> +	  Arria 10 FPGA is only programmed during the cold boot.
> +	  This option forces the FPGA to be reprogrammed every reboot,
> +	  allowing to change the bitstream and apply it with warm reboot.
> +
>  config TARGET_SOCFPGA_CYCLONE5
>  	bool
>  	select TARGET_SOCFPGA_GEN5
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-
> socfpga/spl_a10.c index 9edbbf4a29..d5d3327a42 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -122,7 +122,11 @@ void spl_board_init(void)
>  	arch_early_init_r();
> 
>  	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	if (is_regular_boot_valid()) {
> +#else
>  	if (is_fpgamgr_user_mode()) {
> +#endif
>  		ret = config_pins(gd->fdt_blob, "shared");
>  		if (ret)
>  			return;
> @@ -130,7 +134,11 @@ void spl_board_init(void)
>  		ret = config_pins(gd->fdt_blob, "fpga");
>  		if (ret)
>  			return;
> +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	} else {
> +#else
>  	} else if (!is_fpgamgr_early_user_mode()) {
> +#endif
>  		/* Program IOSSM(early IO release) or full FPGA */
>  		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
> 
> --
> 2.44.0.rc1.240.g4c46232300-goog

Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>

Regards
Tien Fong

Re: [PATCH 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Dinh Nguyen]

On 2/22/24 09:20, Michał Barnaś wrote:
> Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> This option allows to change the bitstream on the filesystem and apply
> changes with warm reboot without the need for a power cycle.
> 
> Signed-off-by: Michał Barnaś <barnas@google.com>
> ---
> 
>   arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
>   arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
>   2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> index 114d243812..89303f1f16 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
>   	imply FPGA_SOCFPGA
>   	imply SPL_USE_TINY_PRINTF
>   
> +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	bool "Always reprogram Arria 10 FPGA"
> +	depends on TARGET_SOCFPGA_ARRIA10
> +	help
> +	  Arria 10 FPGA is only programmed during the cold boot.
> +	  This option forces the FPGA to be reprogrammed every reboot,
> +	  allowing to change the bitstream and apply it with warm reboot.
> +
>   config TARGET_SOCFPGA_CYCLONE5
>   	bool
>   	select TARGET_SOCFPGA_GEN5
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
> index 9edbbf4a29..d5d3327a42 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -122,7 +122,11 @@ void spl_board_init(void)
>   	arch_early_init_r();
>   
>   	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	if (is_regular_boot_valid()) {
> +#else
>   	if (is_fpgamgr_user_mode()) {
> +#endif
>   		ret = config_pins(gd->fdt_blob, "shared");
>   		if (ret)
>   			return;
> @@ -130,7 +134,11 @@ void spl_board_init(void)
>   		ret = config_pins(gd->fdt_blob, "fpga");
>   		if (ret)
>   			return;
> +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	} else {
> +#else
>   	} else if (!is_fpgamgr_early_user_mode()) {
> +#endif
>   		/* Program IOSSM(early IO release) or full FPGA */
>   		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
>   

I got an error while trying to apply this patch:

Checking patch arch/arm/mach-socfpga/Kconfig...
error: while searching for:
	imply FPGA_SOCFPGA
	imply SPL_USE_TINY_PRINTF

config TARGET_SOCFPGA_CYCLONE5
	bool
	select TARGET_SOCFPGA_GEN5

error: patch failed: arch/arm/mach-socfpga/Kconfig:80
Checking patch arch/arm/mach-socfpga/spl_a10.c...

Please rebase to the latest and re-send.

Dinh

[PATCH v2 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Michał Barnaś]

By default, the board requires power cycle (cold boot) to program the
FPGA with bitstream. This change adds Kconfig that allows to enable
reprogramming the FPGA with every boot. This makes the update process
of the bitstream on the filesystem to be applied with simple system
reboot.

Changes in v2:
- Rebase on current master branch

Michał Barnaś (2):
  arm: socfpga: arria10: add option to reprogram the FPGA every reboot
  chameleonv3: set in defconfig for FPGA to reprogram every reboot

 arch/arm/mach-socfpga/Kconfig         | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c       | 8 ++++++++
 configs/socfpga_chameleonv3_defconfig | 1 +
 3 files changed, 17 insertions(+)

-- 
2.44.0.278.ge034bb2e1d-goog

[PATCH v2 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Michał Barnaś]

Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

Changes in v2:
- Rebase on current master branch

 arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 114d243812..89303f1f16 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
 	imply FPGA_SOCFPGA
 	imply SPL_USE_TINY_PRINTF
 
+config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	bool "Always reprogram Arria 10 FPGA"
+	depends on TARGET_SOCFPGA_ARRIA10
+	help
+	  Arria 10 FPGA is only programmed during the cold boot.
+	  This option forces the FPGA to be reprogrammed every reboot,
+	  allowing to change the bitstream and apply it with warm reboot.
+
 config TARGET_SOCFPGA_CYCLONE5
 	bool
 	select TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4a29..d5d3327a42 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -122,7 +122,11 @@ void spl_board_init(void)
 	arch_early_init_r();
 
 	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
+#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	if (is_regular_boot_valid()) {
+#else
 	if (is_fpgamgr_user_mode()) {
+#endif
 		ret = config_pins(gd->fdt_blob, "shared");
 		if (ret)
 			return;
@@ -130,7 +134,11 @@ void spl_board_init(void)
 		ret = config_pins(gd->fdt_blob, "fpga");
 		if (ret)
 			return;
+#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	} else {
+#else
 	} else if (!is_fpgamgr_early_user_mode()) {
+#endif
 		/* Program IOSSM(early IO release) or full FPGA */
 		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
 
-- 
2.44.0.278.ge034bb2e1d-goog

Re: [PATCH v2 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Marek Vasut]

On 3/8/24 6:12 PM, Michał Barnaś wrote:
> Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> This option allows to change the bitstream on the filesystem and apply
> changes with warm reboot without the need for a power cycle.
> 
> Signed-off-by: Michał Barnaś <barnas@google.com>
> ---
> 
> Changes in v2:
> - Rebase on current master branch
> 
>   arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
>   arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
>   2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> index 114d243812..89303f1f16 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
>   	imply FPGA_SOCFPGA
>   	imply SPL_USE_TINY_PRINTF
>   
> +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM

This is not TARGET (as in SoC), but a regular config option, so please 
drop the TARGET_ prefix .

> +	bool "Always reprogram Arria 10 FPGA"
> +	depends on TARGET_SOCFPGA_ARRIA10
> +	help
> +	  Arria 10 FPGA is only programmed during the cold boot.
> +	  This option forces the FPGA to be reprogrammed every reboot,
> +	  allowing to change the bitstream and apply it with warm reboot.
> +
>   config TARGET_SOCFPGA_CYCLONE5
>   	bool
>   	select TARGET_SOCFPGA_GEN5
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
> index 9edbbf4a29..d5d3327a42 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -122,7 +122,11 @@ void spl_board_init(void)
>   	arch_early_init_r();
>   
>   	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	if (is_regular_boot_valid()) {
> +#else
>   	if (is_fpgamgr_user_mode()) {
> +#endif

Use CONFIG_IS_ENABLED() or IS_ENABLED() macro please .

[PATCH v3 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Michał Barnaś]

By default, the board requires power cycle (cold boot) to program the
FPGA with bitstream. This change adds Kconfig that allows to enable
reprogramming the FPGA with every boot. This makes the update process
of the bitstream on the filesystem to be applied with simple system
reboot.

Changes in v3:
- Rebase on current master branch
- Drop the TARGET_ prefix in Kconfig
- Remove #ifdefs and use IS_ENABLED
- Update defconfig to use renamed Kconfig

Changes in v2:
- Rebase on current master branch

Michał Barnaś (2):
  arm: socfpga: arria10: add option to reprogram the FPGA every reboot
  chameleonv3: set in defconfig for FPGA to reprogram every reboot

 arch/arm/mach-socfpga/Kconfig         | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c       | 8 ++++++--
 configs/socfpga_chameleonv3_defconfig | 1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

-- 
2.44.0.291.gc1ea87d7ee-goog

[PATCH v3 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Michał Barnaś]

Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

Changes in v3:
- Rebase on current master branch
- Drop the TARGET_ prefix in Kconfig
- Remove #ifdefs and use IS_ENABLED

Changes in v2:
- Rebase on current master branch

 arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
 arch/arm/mach-socfpga/spl_a10.c | 8 ++++++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 114d243812..a89bd8ca58 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
 	imply FPGA_SOCFPGA
 	imply SPL_USE_TINY_PRINTF
 
+config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+	bool "Always reprogram Arria 10 FPGA"
+	depends on TARGET_SOCFPGA_ARRIA10
+	help
+	  Arria 10 FPGA is only programmed during the cold boot.
+	  This option forces the FPGA to be reprogrammed every reboot,
+	  allowing to change the bitstream and apply it with warm reboot.
+
 config TARGET_SOCFPGA_CYCLONE5
 	bool
 	select TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4a29..3981d2d4f1 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -122,7 +122,10 @@ void spl_board_init(void)
 	arch_early_init_r();
 
 	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
-	if (is_fpgamgr_user_mode()) {
+	if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+	     is_regular_boot_valid()) ||
+	    (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+	     is_fpgamgr_user_mode())) {
 		ret = config_pins(gd->fdt_blob, "shared");
 		if (ret)
 			return;
@@ -130,7 +133,8 @@ void spl_board_init(void)
 		ret = config_pins(gd->fdt_blob, "fpga");
 		if (ret)
 			return;
-	} else if (!is_fpgamgr_early_user_mode()) {
+	} else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
+		   !is_fpgamgr_early_user_mode()) {
 		/* Program IOSSM(early IO release) or full FPGA */
 		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
 
-- 
2.44.0.291.gc1ea87d7ee-goog

RE: [PATCH v3 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Chee, Tien Fong]

> -----Original Message-----
> From: Michał Barnaś <barnas@google.com>
> Sent: Wednesday, March 20, 2024 2:18 AM
> To: u-boot@lists.denx.de
> Cc: Michał Barnaś <barnas@google.com>; Dinh Nguyen
> <dinguyen@kernel.org>; Marek Vasut <marex@denx.de>; Simon Glass
> <sjg@chromium.org>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Tom Rini <trini@konsulko.com>
> Subject: [PATCH v3 1/2] arm: socfpga: arria10: add option to reprogram the
> FPGA every reboot
> 
> Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> This option allows to change the bitstream on the filesystem and apply
> changes with warm reboot without the need for a power cycle.
> 
> Signed-off-by: Michał Barnaś <barnas@google.com>
> ---
> 
> Changes in v3:
> - Rebase on current master branch
> - Drop the TARGET_ prefix in Kconfig
> - Remove #ifdefs and use IS_ENABLED
> 
> Changes in v2:
> - Rebase on current master branch
> 
>  arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
>  arch/arm/mach-socfpga/spl_a10.c | 8 ++++++--
>  2 files changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> socfpga/Kconfig index 114d243812..a89bd8ca58 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
>  	imply FPGA_SOCFPGA
>  	imply SPL_USE_TINY_PRINTF
> 
> +config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> +	bool "Always reprogram Arria 10 FPGA"
> +	depends on TARGET_SOCFPGA_ARRIA10
> +	help
> +	  Arria 10 FPGA is only programmed during the cold boot.
> +	  This option forces the FPGA to be reprogrammed every reboot,
> +	  allowing to change the bitstream and apply it with warm reboot.
> +
>  config TARGET_SOCFPGA_CYCLONE5
>  	bool
>  	select TARGET_SOCFPGA_GEN5
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-
> socfpga/spl_a10.c index 9edbbf4a29..3981d2d4f1 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -122,7 +122,10 @@ void spl_board_init(void)
>  	arch_early_init_r();
> 
>  	/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> -	if (is_fpgamgr_user_mode()) {
> +	if
> ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
> +	     is_regular_boot_valid()) ||
> +
> (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
> +	     is_fpgamgr_user_mode())) {
>  		ret = config_pins(gd->fdt_blob, "shared");
>  		if (ret)
>  			return;
> @@ -130,7 +133,8 @@ void spl_board_init(void)
>  		ret = config_pins(gd->fdt_blob, "fpga");
>  		if (ret)
>  			return;
> -	} else if (!is_fpgamgr_early_user_mode()) {
> +	} else if
> (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
> +		   !is_fpgamgr_early_user_mode()) {
>  		/* Program IOSSM(early IO release) or full FPGA */
>  		fpgamgr_program(buf, FPGA_BUFSIZ, 0);
> 
> --
> 2.44.0.291.gc1ea87d7ee-goog

Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>

Regards
Tien Fong

[PATCH v3 2/2] chameleonv3: set in defconfig for FPGA to reprogram every reboot

[Michał Barnaś]

Set CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM as enabled in
chameleon v3 board's defconfig.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

Changes in v3:
- Update defconfig to use renamed Kconfig

 configs/socfpga_chameleonv3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 6ea61ca6ea..7506aa8d32 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
 CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
+CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT=y
-- 
2.44.0.291.gc1ea87d7ee-goog

RE: [PATCH v3 2/2] chameleonv3: set in defconfig for FPGA to reprogramevery reboot

[Chee, Tien Fong]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of "Michal
> Barnas"
> Sent: Wednesday, March 20, 2024 2:18 AM
> To: u-boot@lists.denx.de
> Cc: "Michał Barnaś" <barnas@google.com>; "Marcel Ziswiler"
> <marcel.ziswiler@toradex.com>; "Martyn Welch"
> <martyn.welch@collabora.com>; "Paweł Anikiel" <pan@semihalf.com>;
> "Simon Glass" <sjg@chromium.org>; "Svyatoslav Ryhel"
> <clamor95@gmail.com>; "Tom Rini" <trini@konsulko.com>
> Subject: [PATCH v3 2/2] chameleonv3: set in defconfig for FPGA to
> reprogramevery reboot
> 
> Set CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM as
> enabled in chameleon v3 board's defconfig.
> 
> Signed-off-by: Michał Barnaś <barnas@google.com>
> ---
> 
> Changes in v3:
> - Update defconfig to use renamed Kconfig
> 
>  configs/socfpga_chameleonv3_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/configs/socfpga_chameleonv3_defconfig
> b/configs/socfpga_chameleonv3_defconfig
> index 6ea61ca6ea..7506aa8d32 100644
> --- a/configs/socfpga_chameleonv3_defconfig
> +++ b/configs/socfpga_chameleonv3_defconfig
> @@ -7,6 +7,7 @@
> CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
>  CONFIG_SPL_TEXT_BASE=0xFFE00000
>  CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
> +CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
>  CONFIG_SPL_FS_FAT=y
>  CONFIG_FIT=y
>  CONFIG_SPL_FIT=y

Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>

Regards
Tien Fong

Re: [PATCH v2 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

[Michał Barnaś]

On Fri, Mar 8, 2024 at 8:01 PM Marek Vasut <marex@denx.de> wrote:
>
> On 3/8/24 6:12 PM, Michał Barnaś wrote:
> > Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> > This option allows to change the bitstream on the filesystem and apply
> > changes with warm reboot without the need for a power cycle.
> >
> > Signed-off-by: Michał Barnaś <barnas@google.com>
> > ---
> >
> > Changes in v2:
> > - Rebase on current master branch
> >
> >   arch/arm/mach-socfpga/Kconfig   | 8 ++++++++
> >   arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
> >   2 files changed, 16 insertions(+)
> >
> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> > index 114d243812..89303f1f16 100644
> > --- a/arch/arm/mach-socfpga/Kconfig
> > +++ b/arch/arm/mach-socfpga/Kconfig
> > @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10
> >       imply FPGA_SOCFPGA
> >       imply SPL_USE_TINY_PRINTF
> >
> > +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
>
> This is not TARGET (as in SoC), but a regular config option, so please
> drop the TARGET_ prefix .
>
> > +     bool "Always reprogram Arria 10 FPGA"
> > +     depends on TARGET_SOCFPGA_ARRIA10
> > +     help
> > +       Arria 10 FPGA is only programmed during the cold boot.
> > +       This option forces the FPGA to be reprogrammed every reboot,
> > +       allowing to change the bitstream and apply it with warm reboot.
> > +
> >   config TARGET_SOCFPGA_CYCLONE5
> >       bool
> >       select TARGET_SOCFPGA_GEN5
> > diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
> > index 9edbbf4a29..d5d3327a42 100644
> > --- a/arch/arm/mach-socfpga/spl_a10.c
> > +++ b/arch/arm/mach-socfpga/spl_a10.c
> > @@ -122,7 +122,11 @@ void spl_board_init(void)
> >       arch_early_init_r();
> >
> >       /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> > +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
> > +     if (is_regular_boot_valid()) {
> > +#else
> >       if (is_fpgamgr_user_mode()) {
> > +#endif
>
> Use CONFIG_IS_ENABLED() or IS_ENABLED() macro please .

I used the ifdefs because I thought that it would be more readable,
but changed as you requested.
Thank you for your response.

[PATCH v2 2/2] chameleonv3: set in defconfig for FPGA to reprogram every reboot

[Michał Barnaś]

Set CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM as enabled in
chameleon v3 board's defconfig.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

(no changes since v1)

 configs/socfpga_chameleonv3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 6ea61ca6ea..25615bb4b4 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
 CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
+CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT=y
-- 
2.44.0.278.ge034bb2e1d-goog

[PATCH 2/2] chameleonv3: set in defconfig for FPGA to reprogram every reboot

[Michał Barnaś]

Set CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM as enabled in
chameleon v3 board's defconfig.

Signed-off-by: Michał Barnaś <barnas@google.com>
---

 configs/socfpga_chameleonv3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 6ea61ca6ea..25615bb4b4 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
 CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
+CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT=y
-- 
2.44.0.rc1.240.g4c46232300-goog

Re: [PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Dinh Nguyen]

On 2/22/24 09:20, Michał Barnaś wrote:
> 
> By default, the board requires power cycle (cold boot) to program the
> FPGA with bitstream. This change adds Kconfig that allows to enable
> reprogramming the FPGA with every boot. This makes the update process
> of the bitstream on the filesystem to be applied with simple system
> reboot.
> 
> 

If we want to enable the reprogramming on every boot, would it make 
sense to just do it and not even bother with the Kconfig option?

Dinh

Re: [PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Michał Barnaś]

On Thu, Feb 29, 2024 at 2:03 PM Dinh Nguyen <dinguyen@kernel.org> wrote:
>
>
>
> On 2/22/24 09:20, Michał Barnaś wrote:
> >
> > By default, the board requires power cycle (cold boot) to program the
> > FPGA with bitstream. This change adds Kconfig that allows to enable
> > reprogramming the FPGA with every boot. This makes the update process
> > of the bitstream on the filesystem to be applied with simple system
> > reboot.
> >
> >
>
> If we want to enable the reprogramming on every boot, would it make
> sense to just do it and not even bother with the Kconfig option?
>
> Dinh

The FPGA programming part takes quite a long time, so it increases the
reboot time significantly.
I don't think that everyone needs the reprogramming to happen every
time. We need that
because our boards are closed in the lab and the power is not easily
accessible, so in case of
update to the bitstream, we should be able to remotely update it with
a pure warm reboot.
So I thought that this should be set by Kconfig to not bother other users with
longer reboot times.

Michał

RE: [PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with warm reboot

[Chee, Tien Fong]

> -----Original Message-----
> From: Michał Barnaś <barnas@google.com>
> Sent: Thursday, February 29, 2024 9:49 PM
> To: Dinh Nguyen <dinguyen@kernel.org>
> Cc: u-boot@lists.denx.de; Marcel Ziswiler <marcel.ziswiler@toradex.com>;
> Marek Vasut <marex@denx.de>; Martyn Welch
> <martyn.welch@collabora.com>; Paweł Anikiel <pan@semihalf.com>; Simon
> Glass <sjg@chromium.org>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Svyatoslav Ryhel
> <clamor95@gmail.com>; Chee, Tien Fong <tien.fong.chee@intel.com>; Tom
> Rini <trini@konsulko.com>
> Subject: Re: [PATCH 0/2] arm: socfpga: arria10: allow to reprogram FPGA with
> warm reboot
> 
> On Thu, Feb 29, 2024 at 2:03 PM Dinh Nguyen <dinguyen@kernel.org> wrote:
> >
> >
> >
> > On 2/22/24 09:20, Michał Barnaś wrote:
> > >
> > > By default, the board requires power cycle (cold boot) to program
> > > the FPGA with bitstream. This change adds Kconfig that allows to
> > > enable reprogramming the FPGA with every boot. This makes the update
> > > process of the bitstream on the filesystem to be applied with simple
> > > system reboot.
> > >
> > >
> >
> > If we want to enable the reprogramming on every boot, would it make
> > sense to just do it and not even bother with the Kconfig option?
> >
> > Dinh
> 
> The FPGA programming part takes quite a long time, so it increases the
> reboot time significantly.
> I don't think that everyone needs the reprogramming to happen every time.
> We need that because our boards are closed in the lab and the power is not
> easily accessible, so in case of update to the bitstream, we should be able to
> remotely update it with a pure warm reboot.
> So I thought that this should be set by Kconfig to not bother other users with
> longer reboot times.
> 
> Michał

Reprogram should be avoided when FPGA already in user mode, this is for FPGA boot first use case.

Full reprogram is slow in SPL, because  very small buffer in this small OCRAM can only be used to process the full RBF.

Since this is an optional configuration, I don't see any issue with these changes.

Tien Fong