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From: Chris Morgan <macroalpha82@gmail.com>
To: u-boot@lists.denx.de
Cc: eugen.hristev@collabora.com, kever.yang@rock-chips.com,
	xypron.glpk@gmx.de, cym@rock-chips.com, philipp.tomsich@vrull.eu,
	sjg@chromium.org, jonas@kwiboo.se, trini@konsulko.com,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [RFC 0/2] Update RAM Bank Logic for RK3588
Date: Sat, 30 Mar 2024 00:05:13 -0500	[thread overview]
Message-ID: <20240330050515.470025-1-macroalpha82@gmail.com> (raw)

From: Chris Morgan <macromorgan@hotmail.com>

Use the ATAG info provided by the Rockchip binary TPL to identify
RAM banks on the RK3588 when using the ROCKCHIP_TPL binary.

This is needed because there are specific addresses that should not
be written to for all RK3588 based devices with >=16GB of RAM, writing
to these addresses immediately results in a crash.

I intended this to be an RFC the first time I submitted it, so I'm
correcting that mistake now. Additionally I have reduced a lot of
the ATAGS code to only focus on the few bits we need in this case.

Chris Morgan (2):
  rockchip: sdram: Allow board/soc specific RAM bank logic
  rockchip: rk3588: Add SoC specific RAM bank logic

 arch/arm/mach-rockchip/rk3588/rk3588.c | 93 ++++++++++++++++++++++++++
 arch/arm/mach-rockchip/sdram.c         |  7 ++
 2 files changed, 100 insertions(+)

-- 
2.34.1


             reply	other threads:[~2024-03-30  5:05 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-30  5:05 Chris Morgan [this message]
2024-03-30  5:05 ` [RFC 1/2] rockchip: sdram: Allow board/soc specific RAM bank logic Chris Morgan
2024-03-30 11:00   ` Jonas Karlman
2024-03-30 15:36     ` Chris Morgan
2024-03-30  5:05 ` [RFC 2/2] rockchip: rk3588: Add SoC " Chris Morgan
2024-03-30 10:53   ` Jonas Karlman
2024-03-30 15:41     ` Chris Morgan

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