* [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
@ 2024-04-04 2:59 Adam Ford
2024-04-04 2:59 ` [PATCH 2/3] arm64: imx: imx8mm-beacon: " Adam Ford
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Adam Ford @ 2024-04-04 2:59 UTC (permalink / raw)
To: u-boot
Cc: aford, Adam Ford, Tom Rini, Stefano Babic, Fabio Estevam,
NXP i.MX U-Boot Team, Kever Yang, Neil Armstrong, Michal Simek,
Marek Vasut, Jonas Karlman, Svyatoslav Ryhel, Tim Harvey,
Caleb Connolly, Sumit Garg, Hai Pham, Peng Fan, Hugo Villeneuve,
Patrick Wildt, Gilles Talis, Marcel Ziswiler, Simon Glass,
Martyn Welch
The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c..04ffa1f165 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1095,7 +1095,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
- imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-dhcom-som-overlay-rev100.dtbo \
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-beacon-kit.dts
deleted file mode 100644
index a08057410b..0000000000
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ /dev/null
@@ -1,783 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
- */
-
-/dts-v1/;
-
-#include <dt-bindings/usb/pd.h>
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-#include "imx8mp.dtsi"
-#include "imx8mp-beacon-som.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
- compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
-
- aliases {
- ethernet0 = &eqos;
- ethernet1 = &fec;
- };
-
- chosen {
- stdout-path = &uart2;
- };
-
- clk_xtal25: clock-xtal25 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hs_ep: endpoint {
- remote-endpoint = <&usb3_hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
-
- ss_ep: endpoint {
- remote-endpoint = <&hd3ss3220_in_ep>;
- };
- };
- };
- };
-
- dmic_codec: dmic-codec {
- compatible = "dmic-codec";
- num-channels = <1>;
- #sound-dai-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- button-0 {
- label = "btn0";
- linux,code = <BTN_0>;
- gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-1 {
- label = "btn1";
- linux,code = <BTN_1>;
- gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-2 {
- label = "btn2";
- linux,code = <BTN_2>;
- gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-3 {
- label = "btn3";
- linux,code = <BTN_3>;
- gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
- };
-
- bridge-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <&adv7535_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_led3>;
-
- led-0 {
- label = "gen_led0";
- gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-1 {
- label = "gen_led1";
- gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-2 {
- label = "gen_led2";
- gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-3 {
- label = "heartbeat";
- gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- reg_audio: regulator-wm8962 {
- compatible = "regulator-fixed";
- regulator-name = "3v3_aud";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- startup-delay-us = <100>;
- off-on-delay-us = <20000>;
- };
-
- reg_usb1_host_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb1_host_vbus";
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound-adv7535 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "sound-adv7535";
- simple-audio-card,format = "i2s";
-
- simple-audio-card,cpu {
- sound-dai = <&sai5>;
- system-clock-direction-out;
- };
-
- simple-audio-card,codec {
- sound-dai = <&adv_bridge>;
- };
- };
-
- sound-dmic {
- compatible = "simple-audio-card";
- simple-audio-card,name = "sound-pdm";
- simple-audio-card,format = "i2s";
- simple-audio-card,bitclock-master = <&dailink_master>;
- simple-audio-card,frame-master = <&dailink_master>;
-
- dailink_master: simple-audio-card,cpu {
- sound-dai = <&micfil>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&dmic_codec>;
- };
- };
-
- sound-wm8962 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8962";
- simple-audio-card,format = "i2s";
- simple-audio-card,widgets = "Headphone", "Headphones",
- "Microphone", "Headset Mic",
- "Speaker", "Speaker";
- simple-audio-card,routing = "Headphones", "HPOUTL",
- "Headphones", "HPOUTR",
- "Speaker", "SPKOUTL",
- "Speaker", "SPKOUTR",
- "Headset Mic", "MICBIAS",
- "IN3R", "Headset Mic";
-
- simple-audio-card,cpu {
- sound-dai = <&sai3>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&wm8962>;
- clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- frame-master;
- bitclock-master;
- };
- };
-};
-
-&audio_blk_ctrl {
- assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
- assigned-clock-rates = <393216000>, <135475200>;
-};
-
-&ecspi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
- status = "okay";
-
- tpm: tpm@0 {
- compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
- reg = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_tpm>;
- reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
- spi-max-frequency = <18500000>;
- };
-};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy1>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@3 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
- reset-assert-us = <10000>;
- reset-deassert-us = <150000>;
- interrupt-parent = <&gpio4>;
- interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
- };
- };
-};
-
-&flexcan1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "okay";
-};
-
-&gpio2 {
- usb-mux-hog {
- gpio-hog;
- gpios = <20 0>;
- output-low;
- line-name = "USB-C Mux En";
- };
-};
-
-&i2c2 {
- clock-frequency = <384000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-
- pca6416_3: gpio@20 {
- compatible = "nxp,pcal6416";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- adv_bridge: hdmi@3d {
- compatible = "adi,adv7535";
- reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
- reg-names = "main", "cec", "edid", "packet";
- adi,dsi-lanes = <4>;
- #sound-dai-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- adv7535_in: endpoint {
- remote-endpoint = <&dsi_out>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- adv7535_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
- };
- };
-
- pcieclk: clock-generator@68 {
- compatible = "renesas,9fgv0241";
- reg = <0x68>;
- clocks = <&clk_xtal25>;
- #clock-cells = <1>;
- };
-};
-
-&i2c3 {
- /* Connected to USB Hub */
- usb-typec@52 {
- compatible = "nxp,ptn5110";
- reg = <0x52>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_typec>;
- interrupt-parent = <&gpio4>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- power-role = "source";
- data-role = "host";
- source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- };
- };
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- clock-frequency = <384000>;
- status = "okay";
-
- wm8962: audio-codec@1a {
- compatible = "wlf,wm8962";
- reg = <0x1a>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wm8962>;
- clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
- assigned-clock-rates = <22576000>;
- DCVDD-supply = <®_audio>;
- DBVDD-supply = <®_audio>;
- AVDD-supply = <®_audio>;
- CPVDD-supply = <®_audio>;
- MICVDD-supply = <®_audio>;
- PLLVDD-supply = <®_audio>;
- SPKVDD1-supply = <®_audio>;
- SPKVDD2-supply = <®_audio>;
- gpio-cfg = <
- 0x0000 /* 0:Default */
- 0x0000 /* 1:Default */
- 0x0000 /* 2:FN_DMICCLK */
- 0x0000 /* 3:Default */
- 0x0000 /* 4:FN_DMICCDAT */
- 0x0000 /* 5:Default */
- >;
- #sound-dai-cells = <0>;
- };
-
- pca6416: gpio@20 {
- compatible = "nxp,pcal6416";
- reg = <0x20>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcal6414>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pca6416_1: gpio@21 {
- compatible = "nxp,pcal6416";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- usb-hub-hog {
- gpio-hog;
- gpios = <7 0>;
- output-low;
- line-name = "USB Hub Enable";
- };
- };
-
- usb-typec@47 {
- compatible = "ti,hd3ss3220";
- reg = <0x47>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hd3ss3220>;
- interrupt-parent = <&gpio4>;
- interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hd3ss3220_in_ep: endpoint {
- remote-endpoint = <&ss_ep>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- hd3ss3220_out_ep: endpoint {
- remote-endpoint = <&usb3_role_switch>;
- };
- };
- };
- };
-};
-
-&lcdif1 {
- status = "okay";
-};
-
-&micfil {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pdm>;
- assigned-clocks = <&clk IMX8MP_CLK_PDM>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <49152000>;
- status = "okay";
-};
-
-&mipi_dsi {
- samsung,esc-clock-frequency = <10000000>;
- status = "okay";
-
- ports {
- port@1 {
- reg = <1>;
-
- dsi_out: endpoint {
- remote-endpoint = <&adv7535_in>;
- };
- };
- };
-};
-
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pcie_phy {
- fsl,clkreq-unsupported;
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
- clocks = <&pcieclk 1>;
- clock-names = "ref";
- status = "okay";
-};
-
-&sai3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai3>;
- assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
- <&clk IMX8MP_AUDIO_PLL2> ;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
- assigned-clock-rates = <12288000>, <361267200>;
- fsl,sai-mclk-direction-output;
- status = "okay";
-};
-
-&sai5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai5>;
- assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <12288000>;
- fsl,sai-mclk-direction-output;
- status = "okay";
-};
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- status = "okay";
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- assigned-clocks = <&clk IMX8MP_CLK_UART3>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&usb3_0 {
- status = "okay";
-};
-
-&usb_dwc3_0 {
- dr_mode = "otg";
- hnp-disable;
- srp-disable;
- adp-disable;
- usb-role-switch;
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usb3_hs_ep: endpoint {
- remote-endpoint = <&hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
- usb3_role_switch: endpoint {
- remote-endpoint = <&hd3ss3220_out_ep>;
- };
- };
- };
-};
-
-&usb3_phy0 {
- vbus-supply = <®_usb1_host_vbus>;
- status = "okay";
-};
-
-&usb3_1 {
- status = "okay";
-};
-
-&usb_dwc3_1 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb3_phy1 {
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
- vmmc-supply = <®_usdhc2_vmmc>;
- bus-width = <4>;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins = <
- MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
- MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
- MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
- MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
- MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
- MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
- MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
- MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
- MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
- MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
- MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
- MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
- MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
- MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
- MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
- MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
- MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
- MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
- >;
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
- MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
- >;
- };
-
- pinctrl_hd3ss3220: hd3ss3220grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
- >;
- };
-
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
- MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
- >;
- };
-
- pinctrl_i2c4: i2c4grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
- MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
- >;
- };
-
- pinctrl_led3: led3grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
- >;
- };
-
- pinctrl_pcal6414: pcal6414-gpiogrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
- >;
- };
-
- pinctrl_pcie: pciegrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
- MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
- >;
- };
-
- pinctrl_pdm: pdmgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
- MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
- >;
- };
-
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
- >;
- };
-
- pinctrl_sai3: sai3grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
- MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
- MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
- MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
- MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
- >;
- };
-
- pinctrl_sai5: sai5grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
- MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
- MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
- >;
- };
-
- pinctrl_tpm: tpmgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
- MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
- >;
- };
-
- pinctrl_typec: typec1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
- >;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <
- MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
- MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
- >;
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins = <
- MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
- MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
- MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
- MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
- >;
- };
-
- pinctrl_wm8962: wm8962grp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59
- >;
- };
-};
diff --git a/arch/arm/dts/imx8mp-beacon-som.dtsi b/arch/arm/dts/imx8mp-beacon-som.dtsi
deleted file mode 100644
index 8be251b693..0000000000
--- a/arch/arm/dts/imx8mp-beacon-som.dtsi
+++ /dev/null
@@ -1,487 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 LogicPD, Inc. dba Beacon EmbeddedWorks
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0xc0000000>,
- <0x1 0x00000000 0 0xc0000000>;
- };
-
- reg_wl_bt: regulator-wifi-bt {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_wl_bt>;
- regulator-name = "wl-bt-pow-dwn";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
- startup-delay-us = <70000>;
- regulator-always-on;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2>;
-};
-
-&eqos {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- snps,force_thresh_dma_mode;
- snps,mtl-rx-config = <&mtl_rx_setup>;
- snps,mtl-tx-config = <&mtl_tx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@3 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio1>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- };
- };
-
- mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <5>;
- snps,rx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- snps,map-to-dma-channel = <0>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- snps,map-to-dma-channel = <1>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- snps,map-to-dma-channel = <2>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- snps,map-to-dma-channel = <3>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- snps,map-to-dma-channel = <4>;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi0>;
- status = "okay";
-
- flash0: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- clock-frequency = <384000>;
- status = "okay";
-
- pmic@25 {
- compatible = "nxp,pca9450c";
- reg = <0x25>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-
- regulators {
- buck1: BUCK1 {
- regulator-name = "BUCK1";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck2: BUCK2 {
- regulator-name = "BUCK2";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- nxp,dvs-run-voltage = <950000>;
- nxp,dvs-standby-voltage = <850000>;
- };
-
- buck4: BUCK4 {
- regulator-name = "BUCK4";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5: BUCK5 {
- regulator-name = "BUCK5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6: BUCK6 {
- regulator-name = "BUCK6";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1: LDO1 {
- regulator-name = "LDO1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3: LDO3 {
- regulator-name = "LDO3";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4: LDO4 {
- regulator-name = "LDO4";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5: LDO5 {
- regulator-name = "LDO5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- clock-frequency = <384000>;
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c64";
- reg = <0x50>;
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MP_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "nxp,88w8997-bt";
- };
-};
-
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <4>;
- vmmc-supply = <®_wl_bt>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- keep-power-in-suspend;
- wakeup-source;
- non-removable;
- cap-power-off-card;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- mwifiex: wifi@1 {
- compatible = "marvell,sd8997";
- reg = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_eqos: eqosgrp {
- fsl,pins = <
- MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
- MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
- MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
- MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
- MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
- MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
- MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
- MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
- MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
- MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
- MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
- MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
- MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
- MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
- MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
- MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x10
- >;
- };
-
- pinctrl_flexspi0: flexspi0grp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
- MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
- MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
- MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
- MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
- MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
- MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
- MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
- >;
- };
-
- pinctrl_pmic: pmicgrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0
- >;
- };
-
- pinctrl_reg_wl_bt: reg-wl-btgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
- MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
- MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140
- MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x140
- >;
- };
-};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 5db643c195..dd6ced5b28 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -184,6 +184,7 @@ config TARGET_IMX8MP_BEACON
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_IMX8MP_DEBIX_MODEL_A
bool "Polyhex i.MX8M Plus Debix Model A SBC"
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index 9d09dd4a7c..0ae8c9645a 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -12,7 +12,7 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mp-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM
2024-04-04 2:59 [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM Adam Ford
@ 2024-04-04 2:59 ` Adam Ford
2024-04-04 2:59 ` [PATCH 3/3] arm64: imx: imx8mn-beacon: " Adam Ford
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Adam Ford @ 2024-04-04 2:59 UTC (permalink / raw)
To: u-boot
Cc: aford, Adam Ford, Tom Rini, Stefano Babic, Fabio Estevam,
NXP i.MX U-Boot Team, Kever Yang, Neil Armstrong, Michal Simek,
Marek Vasut, Jonas Karlman, Svyatoslav Ryhel, Tim Harvey,
Caleb Connolly, Sumit Garg, Hai Pham, Peng Fan, Hugo Villeneuve,
Gilles Talis, Patrick Wildt, Marcel Ziswiler, Martyn Welch,
Simon Glass
The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 04ffa1f165..443d651827 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts b/arch/arm/dts/imx8mm-beacon-kit.dts
deleted file mode 100644
index 74a7b0cc10..0000000000
--- a/arch/arm/dts/imx8mm-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-beacon-som.dtsi"
-#include "imx8mm-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
- compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
-
- chosen {
- stdout-path = &uart2;
- };
-};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi b/arch/arm/dts/imx8mm-beacon-som.dtsi
deleted file mode 100644
index cf07987ccc..0000000000
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ /dev/null
@@ -1,461 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1_gpio>;
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
- clocks = <&osc_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0x80000000>;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2_reg>;
-};
-
-&ddrc {
- operating-points-v2 = <&ddrc_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <25000000>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <100000000>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <750000000>;
- };
- };
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <&osc_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- rohm,dvs-run-voltage = <1000000>;
- rohm,dvs-idle-voltage = <900000>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "ldo2";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "ldo4";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "ldo6";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
-
- eeprom@50 {
- compatible = "microchip,24c64", "atmel,24c64";
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- reg = <0x50>;
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MM_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
- clocks = <&osc_32k>;
- max-speed = <4000000>;
- clock-names = "extclk";
- };
-};
-
-&usdhc1 {
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <4>;
- non-removable;
- cap-power-off-card;
- keep-power-in-suspend;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- status = "okay";
-
- brcmf: bcrmf@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
- >;
- };
-
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
- MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
- MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
- MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
- MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
- MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
- MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
- MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
- >;
- };
-
- pinctrl_usdhc1_gpio: usdhc1gpiogrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111
- >;
- };
-};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index dd6ced5b28..3592f6736b 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -272,6 +272,7 @@ config TARGET_IMX8MM_BEACON
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_IMX8MN_BEACON
bool "imx8mn Beacon Embedded devkit"
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index b926798ae0..0b601bb862 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -10,7 +10,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig
index 341ea47d98..eaf8dce3b5 100644
--- a/configs/imx8mm_beacon_fspi_defconfig
+++ b/configs/imx8mm_beacon_fspi_defconfig
@@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM
2024-04-04 2:59 [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM Adam Ford
2024-04-04 2:59 ` [PATCH 2/3] arm64: imx: imx8mm-beacon: " Adam Ford
@ 2024-04-04 2:59 ` Adam Ford
2024-04-04 4:08 ` [PATCH 1/3] arm64: imx: imx8mp-beacon: " Sumit Garg
2024-04-05 16:47 ` Fabio Estevam
3 siblings, 0 replies; 5+ messages in thread
From: Adam Ford @ 2024-04-04 2:59 UTC (permalink / raw)
To: u-boot
Cc: aford, Adam Ford, Tom Rini, Stefano Babic, Fabio Estevam,
NXP i.MX U-Boot Team, Kever Yang, Neil Armstrong, Michal Simek,
Marek Vasut, Jonas Karlman, Svyatoslav Ryhel, Tim Harvey,
Caleb Connolly, Sumit Garg, Hai Pham, Peng Fan, Hugo Villeneuve,
Patrick Wildt, Gilles Talis, Martyn Welch, Simon Glass,
Marcel Ziswiler
The imx8mn-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 443d651827..6ddd6e311e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-data-modul-edm-sbc.dtb \
diff --git a/arch/arm/dts/imx8mn-beacon-kit.dts b/arch/arm/dts/imx8mn-beacon-kit.dts
deleted file mode 100644
index 1392ce0258..0000000000
--- a/arch/arm/dts/imx8mn-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-beacon-som.dtsi"
-#include "imx8mn-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
- compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
-
- chosen {
- stdout-path = &uart2;
- };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi b/arch/arm/dts/imx8mn-beacon-som.dtsi
deleted file mode 100644
index 1133cded9b..0000000000
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ /dev/null
@@ -1,472 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- spi0 = &flexspi;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1_gpio>;
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
- clocks = <&osc_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0x80000000>;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2_reg>;
-};
-
-/* DDR controller is running LPDDR at 800MHz which requires 0.95V */
-&a53_opp_table {
- opp-1200000000 {
- opp-microvolt = <950000>;
- };
-};
-
-&ddrc {
- operating-points-v2 = <&ddrc_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <25000000>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <100000000>;
- };
-
- opp-800M {
- opp-hz = /bits/ 64 <800000000>;
- };
- };
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- phy-supply = <&buck6_reg>;
- phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
- #clock-cells = <0>;
- clocks = <&osc_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- rohm,dvs-run-voltage = <1000000>;
- rohm,dvs-idle-voltage = <900000>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "ldo2";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "ldo4";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "ldo6";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
-
- eeprom@50 {
- compatible = "microchip,24c64", "atmel,24c64";
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- reg = <0x50>;
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MN_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
- clocks = <&osc_32k>;
- max-speed = <4000000>;
- clock-names = "extclk";
- };
-};
-
-&usdhc1 {
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- vmmc-supply = <&buck4_reg>;
- vqmmc-supply = <&buck5_reg>;
- bus-width = <4>;
- non-removable;
- cap-power-off-card;
- keep-power-in-suspend;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- status = "okay";
-
- brcmf: bcrmf@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
- MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
- MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
- >;
- };
-
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
- MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins = <
- MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
- MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
- MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
- MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
- MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
- MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
- MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
- MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
- >;
- };
-
- pinctrl_usdhc1_gpio: usdhc1gpiogrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111
- >;
- };
-};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 3592f6736b..0bd40bce3b 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -282,6 +282,7 @@ config TARGET_IMX8MN_BEACON
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_PHYCORE_IMX8MM
bool "PHYTEC PHYCORE i.MX8MM"
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 2d4cd1fd97..e8009c410a 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -11,7 +11,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index ec933019aa..ed671cf4a7 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -11,7 +11,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig
index 458afba441..11c257a756 100644
--- a/configs/imx8mn_beacon_fspi_defconfig
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -11,7 +11,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
2024-04-04 2:59 [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM Adam Ford
2024-04-04 2:59 ` [PATCH 2/3] arm64: imx: imx8mm-beacon: " Adam Ford
2024-04-04 2:59 ` [PATCH 3/3] arm64: imx: imx8mn-beacon: " Adam Ford
@ 2024-04-04 4:08 ` Sumit Garg
2024-04-05 16:47 ` Fabio Estevam
3 siblings, 0 replies; 5+ messages in thread
From: Sumit Garg @ 2024-04-04 4:08 UTC (permalink / raw)
To: Adam Ford
Cc: u-boot, aford, Tom Rini, Stefano Babic, Fabio Estevam,
NXP i.MX U-Boot Team, Kever Yang, Neil Armstrong, Michal Simek,
Marek Vasut, Jonas Karlman, Svyatoslav Ryhel, Tim Harvey,
Caleb Connolly, Hai Pham, Peng Fan, Hugo Villeneuve,
Patrick Wildt, Gilles Talis, Marcel Ziswiler, Simon Glass,
Martyn Welch
On Thu, 4 Apr 2024 at 08:29, Adam Ford <aford173@gmail.com> wrote:
>
> The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
> allows for the removal the device tree files.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
For the series:
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
-Sumit
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d85a33055c..04ffa1f165 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1095,7 +1095,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
> imx8mn-beacon-kit.dtb \
> imx8mq-mnt-reform2.dtb \
> imx8mq-phanbell.dtb \
> - imx8mp-beacon-kit.dtb \
> imx8mp-data-modul-edm-sbc.dtb \
> imx8mp-dhcom-som-overlay-rev100.dtbo \
> imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
> diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-beacon-kit.dts
> deleted file mode 100644
> index a08057410b..0000000000
> --- a/arch/arm/dts/imx8mp-beacon-kit.dts
> +++ /dev/null
> @@ -1,783 +0,0 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
> - */
> -
> -/dts-v1/;
> -
> -#include <dt-bindings/usb/pd.h>
> -#include <dt-bindings/phy/phy-imx8-pcie.h>
> -#include "imx8mp.dtsi"
> -#include "imx8mp-beacon-som.dtsi"
> -
> -/ {
> - model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
> - compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
> -
> - aliases {
> - ethernet0 = &eqos;
> - ethernet1 = &fec;
> - };
> -
> - chosen {
> - stdout-path = &uart2;
> - };
> -
> - clk_xtal25: clock-xtal25 {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <25000000>;
> - };
> -
> - connector {
> - compatible = "usb-c-connector";
> - label = "USB-C";
> - data-role = "dual";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - hs_ep: endpoint {
> - remote-endpoint = <&usb3_hs_ep>;
> - };
> - };
> - port@1 {
> - reg = <1>;
> -
> - ss_ep: endpoint {
> - remote-endpoint = <&hd3ss3220_in_ep>;
> - };
> - };
> - };
> - };
> -
> - dmic_codec: dmic-codec {
> - compatible = "dmic-codec";
> - num-channels = <1>;
> - #sound-dai-cells = <0>;
> - };
> -
> - gpio-keys {
> - compatible = "gpio-keys";
> - autorepeat;
> -
> - button-0 {
> - label = "btn0";
> - linux,code = <BTN_0>;
> - gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - wakeup-source;
> - };
> -
> - button-1 {
> - label = "btn1";
> - linux,code = <BTN_1>;
> - gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - wakeup-source;
> - };
> -
> - button-2 {
> - label = "btn2";
> - linux,code = <BTN_2>;
> - gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - wakeup-source;
> - };
> -
> - button-3 {
> - label = "btn3";
> - linux,code = <BTN_3>;
> - gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - wakeup-source;
> - };
> - };
> -
> - bridge-connector {
> - compatible = "hdmi-connector";
> - type = "a";
> -
> - port {
> - hdmi_con: endpoint {
> - remote-endpoint = <&adv7535_out>;
> - };
> - };
> - };
> -
> - leds {
> - compatible = "gpio-leds";
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_led3>;
> -
> - led-0 {
> - label = "gen_led0";
> - gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
> - default-state = "off";
> - };
> -
> - led-1 {
> - label = "gen_led1";
> - gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
> - default-state = "off";
> - };
> -
> - led-2 {
> - label = "gen_led2";
> - gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
> - default-state = "off";
> - };
> -
> - led-3 {
> - label = "heartbeat";
> - gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "heartbeat";
> - };
> - };
> -
> - reg_audio: regulator-wm8962 {
> - compatible = "regulator-fixed";
> - regulator-name = "3v3_aud";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> -
> - reg_usdhc2_vmmc: regulator-usdhc2 {
> - compatible = "regulator-fixed";
> - regulator-name = "VSD_3V3";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - startup-delay-us = <100>;
> - off-on-delay-us = <20000>;
> - };
> -
> - reg_usb1_host_vbus: regulator-usb1-vbus {
> - compatible = "regulator-fixed";
> - regulator-name = "usb1_host_vbus";
> - regulator-max-microvolt = <5000000>;
> - regulator-min-microvolt = <5000000>;
> - gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> -
> - sound-adv7535 {
> - compatible = "simple-audio-card";
> - simple-audio-card,name = "sound-adv7535";
> - simple-audio-card,format = "i2s";
> -
> - simple-audio-card,cpu {
> - sound-dai = <&sai5>;
> - system-clock-direction-out;
> - };
> -
> - simple-audio-card,codec {
> - sound-dai = <&adv_bridge>;
> - };
> - };
> -
> - sound-dmic {
> - compatible = "simple-audio-card";
> - simple-audio-card,name = "sound-pdm";
> - simple-audio-card,format = "i2s";
> - simple-audio-card,bitclock-master = <&dailink_master>;
> - simple-audio-card,frame-master = <&dailink_master>;
> -
> - dailink_master: simple-audio-card,cpu {
> - sound-dai = <&micfil>;
> - };
> -
> - simple-audio-card,codec {
> - sound-dai = <&dmic_codec>;
> - };
> - };
> -
> - sound-wm8962 {
> - compatible = "simple-audio-card";
> - simple-audio-card,name = "wm8962";
> - simple-audio-card,format = "i2s";
> - simple-audio-card,widgets = "Headphone", "Headphones",
> - "Microphone", "Headset Mic",
> - "Speaker", "Speaker";
> - simple-audio-card,routing = "Headphones", "HPOUTL",
> - "Headphones", "HPOUTR",
> - "Speaker", "SPKOUTL",
> - "Speaker", "SPKOUTR",
> - "Headset Mic", "MICBIAS",
> - "IN3R", "Headset Mic";
> -
> - simple-audio-card,cpu {
> - sound-dai = <&sai3>;
> - };
> -
> - simple-audio-card,codec {
> - sound-dai = <&wm8962>;
> - clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> - frame-master;
> - bitclock-master;
> - };
> - };
> -};
> -
> -&audio_blk_ctrl {
> - assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
> - assigned-clock-rates = <393216000>, <135475200>;
> -};
> -
> -&ecspi2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_ecspi2>;
> - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> - status = "okay";
> -
> - tpm: tpm@0 {
> - compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
> - reg = <0>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_tpm>;
> - reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
> - spi-max-frequency = <18500000>;
> - };
> -};
> -
> -&fec {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_fec>;
> - phy-mode = "rgmii-id";
> - phy-handle = <ðphy1>;
> - fsl,magic-packet;
> - status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy1: ethernet-phy@3 {
> - compatible = "ethernet-phy-id0022.1640",
> - "ethernet-phy-ieee802.3-c22";
> - reg = <3>;
> - reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
> - reset-assert-us = <10000>;
> - reset-deassert-us = <150000>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
> - };
> - };
> -};
> -
> -&flexcan1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_flexcan1>;
> - status = "okay";
> -};
> -
> -&gpio2 {
> - usb-mux-hog {
> - gpio-hog;
> - gpios = <20 0>;
> - output-low;
> - line-name = "USB-C Mux En";
> - };
> -};
> -
> -&i2c2 {
> - clock-frequency = <384000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c2>;
> - status = "okay";
> -
> - pca6416_3: gpio@20 {
> - compatible = "nxp,pcal6416";
> - reg = <0x20>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> -
> - adv_bridge: hdmi@3d {
> - compatible = "adi,adv7535";
> - reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
> - reg-names = "main", "cec", "edid", "packet";
> - adi,dsi-lanes = <4>;
> - #sound-dai-cells = <0>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - adv7535_in: endpoint {
> - remote-endpoint = <&dsi_out>;
> - };
> - };
> -
> - port@1 {
> - reg = <1>;
> -
> - adv7535_out: endpoint {
> - remote-endpoint = <&hdmi_con>;
> - };
> - };
> - };
> - };
> -
> - pcieclk: clock-generator@68 {
> - compatible = "renesas,9fgv0241";
> - reg = <0x68>;
> - clocks = <&clk_xtal25>;
> - #clock-cells = <1>;
> - };
> -};
> -
> -&i2c3 {
> - /* Connected to USB Hub */
> - usb-typec@52 {
> - compatible = "nxp,ptn5110";
> - reg = <0x52>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_typec>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> -
> - connector {
> - compatible = "usb-c-connector";
> - label = "USB-C";
> - power-role = "source";
> - data-role = "host";
> - source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> - };
> - };
> -};
> -
> -&i2c4 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c4>;
> - clock-frequency = <384000>;
> - status = "okay";
> -
> - wm8962: audio-codec@1a {
> - compatible = "wlf,wm8962";
> - reg = <0x1a>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_wm8962>;
> - clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> - assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> - assigned-clock-rates = <22576000>;
> - DCVDD-supply = <®_audio>;
> - DBVDD-supply = <®_audio>;
> - AVDD-supply = <®_audio>;
> - CPVDD-supply = <®_audio>;
> - MICVDD-supply = <®_audio>;
> - PLLVDD-supply = <®_audio>;
> - SPKVDD1-supply = <®_audio>;
> - SPKVDD2-supply = <®_audio>;
> - gpio-cfg = <
> - 0x0000 /* 0:Default */
> - 0x0000 /* 1:Default */
> - 0x0000 /* 2:FN_DMICCLK */
> - 0x0000 /* 3:Default */
> - 0x0000 /* 4:FN_DMICCDAT */
> - 0x0000 /* 5:Default */
> - >;
> - #sound-dai-cells = <0>;
> - };
> -
> - pca6416: gpio@20 {
> - compatible = "nxp,pcal6416";
> - reg = <0x20>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_pcal6414>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> -
> - pca6416_1: gpio@21 {
> - compatible = "nxp,pcal6416";
> - reg = <0x21>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> -
> - usb-hub-hog {
> - gpio-hog;
> - gpios = <7 0>;
> - output-low;
> - line-name = "USB Hub Enable";
> - };
> - };
> -
> - usb-typec@47 {
> - compatible = "ti,hd3ss3220";
> - reg = <0x47>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_hd3ss3220>;
> - interrupt-parent = <&gpio4>;
> - interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - hd3ss3220_in_ep: endpoint {
> - remote-endpoint = <&ss_ep>;
> - };
> - };
> -
> - port@1 {
> - reg = <1>;
> -
> - hd3ss3220_out_ep: endpoint {
> - remote-endpoint = <&usb3_role_switch>;
> - };
> - };
> - };
> - };
> -};
> -
> -&lcdif1 {
> - status = "okay";
> -};
> -
> -&micfil {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_pdm>;
> - assigned-clocks = <&clk IMX8MP_CLK_PDM>;
> - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> - assigned-clock-rates = <49152000>;
> - status = "okay";
> -};
> -
> -&mipi_dsi {
> - samsung,esc-clock-frequency = <10000000>;
> - status = "okay";
> -
> - ports {
> - port@1 {
> - reg = <1>;
> -
> - dsi_out: endpoint {
> - remote-endpoint = <&adv7535_in>;
> - };
> - };
> - };
> -};
> -
> -&pcie {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_pcie>;
> - reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
> - status = "okay";
> -};
> -
> -&pcie_phy {
> - fsl,clkreq-unsupported;
> - fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> - clocks = <&pcieclk 1>;
> - clock-names = "ref";
> - status = "okay";
> -};
> -
> -&sai3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_sai3>;
> - assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
> - <&clk IMX8MP_AUDIO_PLL2> ;
> - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> - assigned-clock-rates = <12288000>, <361267200>;
> - fsl,sai-mclk-direction-output;
> - status = "okay";
> -};
> -
> -&sai5 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_sai5>;
> - assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
> - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> - assigned-clock-rates = <12288000>;
> - fsl,sai-mclk-direction-output;
> - status = "okay";
> -};
> -
> -&snvs_pwrkey {
> - status = "okay";
> -};
> -
> -&uart2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart2>;
> - status = "okay";
> -};
> -
> -&uart3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart3>;
> - assigned-clocks = <&clk IMX8MP_CLK_UART3>;
> - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> - uart-has-rtscts;
> - status = "okay";
> -};
> -
> -&usb3_0 {
> - status = "okay";
> -};
> -
> -&usb_dwc3_0 {
> - dr_mode = "otg";
> - hnp-disable;
> - srp-disable;
> - adp-disable;
> - usb-role-switch;
> - status = "okay";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - usb3_hs_ep: endpoint {
> - remote-endpoint = <&hs_ep>;
> - };
> - };
> - port@1 {
> - reg = <1>;
> - usb3_role_switch: endpoint {
> - remote-endpoint = <&hd3ss3220_out_ep>;
> - };
> - };
> - };
> -};
> -
> -&usb3_phy0 {
> - vbus-supply = <®_usb1_host_vbus>;
> - status = "okay";
> -};
> -
> -&usb3_1 {
> - status = "okay";
> -};
> -
> -&usb_dwc3_1 {
> - dr_mode = "host";
> - status = "okay";
> -};
> -
> -&usb3_phy1 {
> - status = "okay";
> -};
> -
> -&usdhc2 {
> - pinctrl-names = "default", "state_100mhz", "state_200mhz";
> - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> - vmmc-supply = <®_usdhc2_vmmc>;
> - bus-width = <4>;
> - status = "okay";
> -};
> -
> -&iomuxc {
> - pinctrl_ecspi2: ecspi2grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
> - MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
> - MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
> - MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
> - >;
> - };
> -
> - pinctrl_fec: fecgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
> - MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
> - MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
> - MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
> - MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
> - MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
> - MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
> - MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
> - MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
> - MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
> - MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
> - MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
> - MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
> - MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
> - MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
> - MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
> - >;
> - };
> -
> - pinctrl_flexcan1: flexcan1grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
> - MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
> - >;
> - };
> -
> - pinctrl_hd3ss3220: hd3ss3220grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
> - >;
> - };
> -
> - pinctrl_i2c2: i2c2grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
> - MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
> - >;
> - };
> -
> - pinctrl_i2c4: i2c4grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
> - MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
> - >;
> - };
> -
> - pinctrl_led3: led3grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
> - >;
> - };
> -
> - pinctrl_pcal6414: pcal6414-gpiogrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
> - >;
> - };
> -
> - pinctrl_pcie: pciegrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
> - MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
> - >;
> - };
> -
> - pinctrl_pdm: pdmgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
> - MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
> - >;
> - };
> -
> - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
> - >;
> - };
> -
> - pinctrl_sai3: sai3grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
> - MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
> - MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
> - MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
> - MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
> - >;
> - };
> -
> - pinctrl_sai5: sai5grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
> - MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
> - MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
> - >;
> - };
> -
> - pinctrl_tpm: tpmgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
> - MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
> - >;
> - };
> -
> - pinctrl_typec: typec1grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
> - >;
> - };
> -
> - pinctrl_uart2: uart2grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
> - MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
> - >;
> - };
> -
> - pinctrl_uart3: uart3grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
> - MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
> - MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
> - MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
> - >;
> - };
> -
> - pinctrl_usdhc2: usdhc2grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
> - MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
> - MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
> - MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
> - MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
> - MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
> - MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
> - >;
> - };
> -
> - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
> - MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
> - MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
> - MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
> - MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
> - MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
> - MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
> - >;
> - };
> -
> - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
> - MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
> - MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
> - MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
> - MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
> - MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
> - MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
> - >;
> - };
> -
> - pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
> - >;
> - };
> -
> - pinctrl_wm8962: wm8962grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59
> - >;
> - };
> -};
> diff --git a/arch/arm/dts/imx8mp-beacon-som.dtsi b/arch/arm/dts/imx8mp-beacon-som.dtsi
> deleted file mode 100644
> index 8be251b693..0000000000
> --- a/arch/arm/dts/imx8mp-beacon-som.dtsi
> +++ /dev/null
> @@ -1,487 +0,0 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright 2023 LogicPD, Inc. dba Beacon EmbeddedWorks
> - */
> -
> -/ {
> - aliases {
> - rtc0 = &rtc;
> - rtc1 = &snvs_rtc;
> - };
> -
> - memory@40000000 {
> - device_type = "memory";
> - reg = <0x0 0x40000000 0 0xc0000000>,
> - <0x1 0x00000000 0 0xc0000000>;
> - };
> -
> - reg_wl_bt: regulator-wifi-bt {
> - compatible = "regulator-fixed";
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_reg_wl_bt>;
> - regulator-name = "wl-bt-pow-dwn";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
> - startup-delay-us = <70000>;
> - regulator-always-on;
> - };
> -};
> -
> -&A53_0 {
> - cpu-supply = <&buck2>;
> -};
> -
> -&A53_1 {
> - cpu-supply = <&buck2>;
> -};
> -
> -&A53_2 {
> - cpu-supply = <&buck2>;
> -};
> -
> -&A53_3 {
> - cpu-supply = <&buck2>;
> -};
> -
> -&eqos {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_eqos>;
> - phy-mode = "rgmii-id";
> - phy-handle = <ðphy0>;
> - snps,force_thresh_dma_mode;
> - snps,mtl-rx-config = <&mtl_rx_setup>;
> - snps,mtl-tx-config = <&mtl_tx_setup>;
> - status = "okay";
> -
> - mdio {
> - compatible = "snps,dwmac-mdio";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy0: ethernet-phy@3 {
> - compatible = "ethernet-phy-id0022.1640",
> - "ethernet-phy-ieee802.3-c22";
> - reg = <3>;
> - reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
> - interrupt-parent = <&gpio1>;
> - interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
> - };
> - };
> -
> - mtl_rx_setup: rx-queues-config {
> - snps,rx-queues-to-use = <5>;
> - snps,rx-sched-sp;
> -
> - queue0 {
> - snps,dcb-algorithm;
> - snps,priority = <0x1>;
> - snps,map-to-dma-channel = <0>;
> - };
> -
> - queue1 {
> - snps,dcb-algorithm;
> - snps,priority = <0x2>;
> - snps,map-to-dma-channel = <1>;
> - };
> -
> - queue2 {
> - snps,dcb-algorithm;
> - snps,priority = <0x4>;
> - snps,map-to-dma-channel = <2>;
> - };
> -
> - queue3 {
> - snps,dcb-algorithm;
> - snps,priority = <0x8>;
> - snps,map-to-dma-channel = <3>;
> - };
> -
> - queue4 {
> - snps,dcb-algorithm;
> - snps,priority = <0xf0>;
> - snps,map-to-dma-channel = <4>;
> - };
> - };
> -
> - mtl_tx_setup: tx-queues-config {
> - snps,tx-queues-to-use = <5>;
> - snps,tx-sched-sp;
> -
> - queue0 {
> - snps,dcb-algorithm;
> - snps,priority = <0x1>;
> - };
> -
> - queue1 {
> - snps,dcb-algorithm;
> - snps,priority = <0x2>;
> - };
> -
> - queue2 {
> - snps,dcb-algorithm;
> - snps,priority = <0x4>;
> - };
> -
> - queue3 {
> - snps,dcb-algorithm;
> - snps,priority = <0x8>;
> - };
> -
> - queue4 {
> - snps,dcb-algorithm;
> - snps,priority = <0xf0>;
> - };
> - };
> -};
> -
> -&flexspi {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_flexspi0>;
> - status = "okay";
> -
> - flash0: flash@0 {
> - compatible = "jedec,spi-nor";
> - reg = <0>;
> - spi-max-frequency = <80000000>;
> - spi-tx-bus-width = <1>;
> - spi-rx-bus-width = <4>;
> - };
> -};
> -
> -&i2c1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c1>;
> - clock-frequency = <384000>;
> - status = "okay";
> -
> - pmic@25 {
> - compatible = "nxp,pca9450c";
> - reg = <0x25>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_pmic>;
> - interrupt-parent = <&gpio1>;
> - interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> -
> - regulators {
> - buck1: BUCK1 {
> - regulator-name = "BUCK1";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <2187500>;
> - regulator-boot-on;
> - regulator-always-on;
> - regulator-ramp-delay = <3125>;
> - };
> -
> - buck2: BUCK2 {
> - regulator-name = "BUCK2";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <2187500>;
> - regulator-boot-on;
> - regulator-always-on;
> - regulator-ramp-delay = <3125>;
> - nxp,dvs-run-voltage = <950000>;
> - nxp,dvs-standby-voltage = <850000>;
> - };
> -
> - buck4: BUCK4 {
> - regulator-name = "BUCK4";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - buck5: BUCK5 {
> - regulator-name = "BUCK5";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - buck6: BUCK6 {
> - regulator-name = "BUCK6";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <3400000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - ldo1: LDO1 {
> - regulator-name = "LDO1";
> - regulator-min-microvolt = <1600000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - ldo3: LDO3 {
> - regulator-name = "LDO3";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - ldo4: LDO4 {
> - regulator-name = "LDO4";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> -
> - ldo5: LDO5 {
> - regulator-name = "LDO5";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-boot-on;
> - regulator-always-on;
> - };
> - };
> - };
> -};
> -
> -&i2c3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c3>;
> - clock-frequency = <384000>;
> - status = "okay";
> -
> - eeprom@50 {
> - compatible = "atmel,24c64";
> - reg = <0x50>;
> - pagesize = <32>;
> - read-only; /* Manufacturing EEPROM programmed at factory */
> - };
> -
> - rtc: rtc@51 {
> - compatible = "nxp,pcf85263";
> - reg = <0x51>;
> - };
> -};
> -
> -&snvs_pwrkey {
> - status = "okay";
> -};
> -
> -&uart1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart1>;
> - assigned-clocks = <&clk IMX8MP_CLK_UART1>;
> - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> - uart-has-rtscts;
> - status = "okay";
> -
> - bluetooth {
> - compatible = "nxp,88w8997-bt";
> - };
> -};
> -
> -&usdhc1 {
> - pinctrl-names = "default", "state_100mhz", "state_200mhz";
> - pinctrl-0 = <&pinctrl_usdhc1>;
> - pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> - pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> - bus-width = <4>;
> - vmmc-supply = <®_wl_bt>;
> - cap-sd-highspeed;
> - sd-uhs-sdr50;
> - sd-uhs-sdr104;
> - keep-power-in-suspend;
> - wakeup-source;
> - non-removable;
> - cap-power-off-card;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "okay";
> -
> - mwifiex: wifi@1 {
> - compatible = "marvell,sd8997";
> - reg = <1>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_wlan>;
> - interrupt-parent = <&gpio2>;
> - interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
> - };
> -};
> -
> -&usdhc3 {
> - pinctrl-names = "default", "state_100mhz", "state_200mhz";
> - pinctrl-0 = <&pinctrl_usdhc3>;
> - pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> - pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> - bus-width = <8>;
> - non-removable;
> - status = "okay";
> -};
> -
> -&wdog1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_wdog>;
> - fsl,ext-reset-output;
> - status = "okay";
> -};
> -
> -&iomuxc {
> - pinctrl_eqos: eqosgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
> - MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
> - MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
> - MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
> - MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
> - MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
> - MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
> - MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
> - MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
> - MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
> - MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
> - MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
> - MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
> - MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
> - MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
> - MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x10
> - >;
> - };
> -
> - pinctrl_flexspi0: flexspi0grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
> - MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
> - MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
> - MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
> - MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
> - MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
> - >;
> - };
> -
> - pinctrl_i2c1: i2c1grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
> - MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
> - >;
> - };
> -
> - pinctrl_i2c3: i2c3grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
> - MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
> - >;
> - };
> -
> - pinctrl_pmic: pmicgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0
> - >;
> - };
> -
> - pinctrl_reg_wl_bt: reg-wl-btgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
> - >;
> - };
> -
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
> - MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
> - MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140
> - MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140
> - >;
> - };
> -
> - pinctrl_usdhc1: usdhc1grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
> - MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
> - MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
> - MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
> - MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
> - MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
> - >;
> - };
> -
> - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
> - MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
> - MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
> - MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
> - MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
> - MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
> - >;
> - };
> -
> - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
> - MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
> - MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
> - MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
> - MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
> - MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
> - >;
> - };
> -
> - pinctrl_usdhc3: usdhc3grp {
> - fsl,pins = <
> - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
> - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
> - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
> - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
> - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
> - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
> - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
> - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
> - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
> - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
> - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
> - >;
> - };
> -
> - pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
> - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
> - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
> - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
> - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
> - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
> - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
> - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
> - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
> - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
> - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
> - >;
> - };
> -
> - pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
> - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
> - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
> - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
> - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
> - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
> - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
> - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
> - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
> - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
> - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
> - >;
> - };
> -
> - pinctrl_wdog: wdoggrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
> - >;
> - };
> -
> - pinctrl_wlan: wlangrp {
> - fsl,pins = <
> - MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x140
> - >;
> - };
> -};
> diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
> index 5db643c195..dd6ced5b28 100644
> --- a/arch/arm/mach-imx/imx8m/Kconfig
> +++ b/arch/arm/mach-imx/imx8m/Kconfig
> @@ -184,6 +184,7 @@ config TARGET_IMX8MP_BEACON
> select FSL_CAAM
> select ARCH_MISC_INIT
> select SPL_CRYPTO if SPL
> + imply OF_UPSTREAM
>
> config TARGET_IMX8MP_DEBIX_MODEL_A
> bool "Polyhex i.MX8M Plus Debix Model A SBC"
> diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
> index 9d09dd4a7c..0ae8c9645a 100644
> --- a/configs/imx8mp_beacon_defconfig
> +++ b/configs/imx8mp_beacon_defconfig
> @@ -12,7 +12,7 @@ CONFIG_SF_DEFAULT_MODE=0
> CONFIG_ENV_SIZE=0x2000
> CONFIG_ENV_OFFSET=0xFFFFDE00
> CONFIG_DM_GPIO=y
> -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-beacon-kit"
> +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
> CONFIG_SPL_TEXT_BASE=0x920000
> CONFIG_TARGET_IMX8MP_BEACON=y
> CONFIG_SYS_MONITOR_LEN=524288
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
2024-04-04 2:59 [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM Adam Ford
` (2 preceding siblings ...)
2024-04-04 4:08 ` [PATCH 1/3] arm64: imx: imx8mp-beacon: " Sumit Garg
@ 2024-04-05 16:47 ` Fabio Estevam
3 siblings, 0 replies; 5+ messages in thread
From: Fabio Estevam @ 2024-04-05 16:47 UTC (permalink / raw)
To: Adam Ford
Cc: u-boot, aford, Tom Rini, Stefano Babic, NXP i.MX U-Boot Team,
Kever Yang, Neil Armstrong, Michal Simek, Marek Vasut,
Jonas Karlman, Svyatoslav Ryhel, Tim Harvey, Caleb Connolly,
Sumit Garg, Hai Pham, Peng Fan, Hugo Villeneuve, Patrick Wildt,
Gilles Talis, Marcel Ziswiler, Simon Glass, Martyn Welch
On Wed, Apr 3, 2024 at 11:59 PM Adam Ford <aford173@gmail.com> wrote:
>
> The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
> allows for the removal the device tree files.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-04-05 16:47 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2024-04-04 2:59 [PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM Adam Ford
2024-04-04 2:59 ` [PATCH 2/3] arm64: imx: imx8mm-beacon: " Adam Ford
2024-04-04 2:59 ` [PATCH 3/3] arm64: imx: imx8mn-beacon: " Adam Ford
2024-04-04 4:08 ` [PATCH 1/3] arm64: imx: imx8mp-beacon: " Sumit Garg
2024-04-05 16:47 ` Fabio Estevam
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