From: Judith Mendez <jm@ti.com>
To: Peng Fan <peng.fan@nxp.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
Tom Rini <trini@konsulko.com>
Cc: Nitin Yadav <n-yadav@ti.com>, Simon Glass <sjg@chromium.org>,
<u-boot@lists.denx.de>
Subject: [PATCH 0/5] Fix MMC tuning algorithm
Date: Mon, 15 Apr 2024 16:27:42 -0500 [thread overview]
Message-ID: <20240415212747.2678974-1-jm@ti.com> (raw)
The following patch series includes a MMC tuning algorithm
fix according to the following published paper [0].
This seris also includes fixes for OTAP/ITAP delay values
in j721e_4bit_sdhci_set_ios_post and for HS400 mode.
For DDR52 mode, also set ENDLL=1 and call am654_sdhci_setup_dll()
instead of am654_sdhci_setup_delay_chain() according to
device datasheet[1].
[0] https://www.ti.com/lit/an/spract9/spract9.pdf
[1] https://www.ti.com/lit/ds/symlink/am62p.pdf
Judith Mendez (4):
mmc: am654_sdhci: Add tuning algorithm for delay chain
mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit
mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode
mmc: am654_sdhci: Fix ITAPDLY for HS400 timing
Nitin Yadav (1):
mmc: am654_sdhci: Fix OTAP/ITAP delay values
drivers/mmc/am654_sdhci.c | 170 +++++++++++++++++++++++++++++++-------
1 file changed, 138 insertions(+), 32 deletions(-)
base-commit: 27795dd717dadc73091e1b4d6c50952b93aaa819
--
2.43.2
next reply other threads:[~2024-04-15 21:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-15 21:27 Judith Mendez [this message]
2024-04-15 21:27 ` [PATCH 1/5] mmc: am654_sdhci: Add tuning algorithm for delay chain Judith Mendez
2024-04-17 11:23 ` Jaehoon Chung
2024-04-18 14:28 ` Judith Mendez
2024-04-15 21:27 ` [PATCH 2/5] mmc: am654_sdhci: Fix OTAP/ITAP delay values Judith Mendez
2024-04-17 11:28 ` Jaehoon Chung
2024-04-18 14:39 ` Judith Mendez
2024-04-15 21:27 ` [PATCH 3/5] mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit Judith Mendez
2024-04-17 11:34 ` Jaehoon Chung
2024-04-18 14:40 ` Judith Mendez
2024-04-15 21:27 ` [PATCH 4/5] mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode Judith Mendez
2024-04-17 11:36 ` Jaehoon Chung
2024-04-15 21:27 ` [PATCH 5/5] mmc: am654_sdhci: Fix ITAPDLY for HS400 timing Judith Mendez
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