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From: Judith Mendez <jm@ti.com>
To: Peng Fan <peng.fan@nxp.com>,
	Jaehoon Chung <jh80.chung@samsung.com>,
	Tom Rini <trini@konsulko.com>
Cc: Nitin Yadav <n-yadav@ti.com>, Simon Glass <sjg@chromium.org>,
	<u-boot@lists.denx.de>
Subject: [PATCH 5/5] mmc: am654_sdhci: Fix ITAPDLY for HS400 timing
Date: Mon, 15 Apr 2024 16:27:47 -0500	[thread overview]
Message-ID: <20240415212747.2678974-6-jm@ti.com> (raw)
In-Reply-To: <20240415212747.2678974-1-jm@ti.com>

At HS400 mode the ITAPDLY value is that from High Speed mode
which is incorrect and may cause boot failures.

The ITAPDLY for HS400 speed mode should be the same as ITAPDLY
as HS200 timing after tuning is executed. Add the functionality
to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY.

Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/mmc/am654_sdhci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index dee56dfdbaa..ce3813ea3d0 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -293,6 +293,11 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
 			return ret;
 
 		plat->dll_enable = true;
+		if (mode == MMC_HS_400) {
+			plat->itap_del_ena[mode] = 0x1;
+			plat->itap_del_sel[mode] = plat->itap_del_sel[mode - 1];
+		}
+
 		am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode],
 					  plat->itap_del_ena[mode]);
 	} else {
@@ -484,6 +489,9 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
 	itap = am654_sdhci_calculate_itap(dev, fail_window, fail_index,
 					  plat->dll_enable);
 
+	/* Save ITAPDLY */
+	plat->itap_del_sel[mode] = itap;
+
 	am654_sdhci_write_itapdly(plat, itap, plat->itap_del_ena[mode]);
 
 	return 0;
-- 
2.43.2


      parent reply	other threads:[~2024-04-15 21:28 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-15 21:27 [PATCH 0/5] Fix MMC tuning algorithm Judith Mendez
2024-04-15 21:27 ` [PATCH 1/5] mmc: am654_sdhci: Add tuning algorithm for delay chain Judith Mendez
2024-04-17 11:23   ` Jaehoon Chung
2024-04-18 14:28     ` Judith Mendez
2024-04-15 21:27 ` [PATCH 2/5] mmc: am654_sdhci: Fix OTAP/ITAP delay values Judith Mendez
2024-04-17 11:28   ` Jaehoon Chung
2024-04-18 14:39     ` Judith Mendez
2024-04-15 21:27 ` [PATCH 3/5] mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit Judith Mendez
2024-04-17 11:34   ` Jaehoon Chung
2024-04-18 14:40     ` Judith Mendez
2024-04-15 21:27 ` [PATCH 4/5] mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode Judith Mendez
2024-04-17 11:36   ` Jaehoon Chung
2024-04-15 21:27 ` Judith Mendez [this message]

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