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Sat, 20 Apr 2024 00:09:43 -0700 (PDT) Received: from localhost.localdomain ([120.204.189.229]) by smtp.gmail.com with ESMTPSA id p5-20020a170903248500b001e43576a7a1sm4443065plw.222.2024.04.20.00.09.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Apr 2024 00:09:43 -0700 (PDT) From: Kongyang Liu To: u-boot@lists.denx.de Cc: Leo , Rick Chen , Tom Rini Subject: [PATCH 2/3] riscv: dts: sophgo: Add spi nor flash controller node Date: Sat, 20 Apr 2024 15:08:24 +0800 Message-ID: <20240420070923.9154-3-seashell11234455@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240420070923.9154-1-seashell11234455@gmail.com> References: <20240420070923.9154-1-seashell11234455@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Sat, 20 Apr 2024 12:11:39 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add spi nor flash controller node for cv18xx SoCs Signed-off-by: Kongyang Liu --- arch/riscv/dts/cv1800b-milkv-duo.dts | 13 +++++++++++++ arch/riscv/dts/cv18xx.dtsi | 17 +++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts index 94e64ddce8..dd2c9cd17c 100644 --- a/arch/riscv/dts/cv1800b-milkv-duo.dts +++ b/arch/riscv/dts/cv1800b-milkv-duo.dts @@ -41,6 +41,19 @@ no-sdio; }; +&spif { + status = "okay"; + + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <75000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + m25p,fast-read; + }; +} + &uart0 { status = "okay"; }; diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi index ec99c4deeb..1623e354df 100644 --- a/arch/riscv/dts/cv18xx.dtsi +++ b/arch/riscv/dts/cv18xx.dtsi @@ -52,6 +52,13 @@ #clock-cells = <0>; }; + spif_clk: spi-flash-clock { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + clock-output-names = "spif_clk"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; @@ -197,6 +204,16 @@ status = "disabled"; }; + spif: spi-nor@10000000 { + compatible = "sophgo,cv1800b-spif"; + reg = <0x10000000 0x10000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&spif_clk>; + interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + plic: interrupt-controller@70000000 { reg = <0x70000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; -- 2.41.0