From: Philip Oberfichtner <pro@denx.de>
To: u-boot@lists.denx.de
Cc: bmeng.cn@gmail.com, caleb.connolly@linaro.org,
christophe.roullier@foss.st.com, epsi@gmx.de,
eugen.hristev@collabora.com, festevam@gmail.com,
forbidden405@outlook.com, ivprusov@salutedevices.com,
joe.hershberger@ni.com, jonas@kwiboo.se,
kever.yang@rock-chips.com, leyfoon.tan@starfivetech.com,
marek.vasut+renesas@mailbox.org,
marjolaine.amate@odyssee-systemes.fr, neil.armstrong@linaro.org,
n-francis@ti.com, patrice.chotard@foss.st.com,
patrick.delaunay@foss.st.com, philipp.tomsich@vrull.eu,
rfried.dev@gmail.com, seanga2@gmail.com,
sebastian.reichel@collabora.com,
sebastien.szymanski@armadeus.com, sjg@chromium.org,
sumit.garg@linaro.org, trini@konsulko.com, xypron.glpk@gmx.de,
yanhong.wang@starfivetech.com, Philip Oberfichtner <pro@denx.de>
Subject: [PATCH 1/5] x86: provide mb() macro
Date: Fri, 3 May 2024 10:49:46 +0200 [thread overview]
Message-ID: <20240503084950.70680-2-pro@denx.de> (raw)
In-Reply-To: <20240503084950.70680-1-pro@denx.de>
Implement memory barrier using mfence. Linux does it equivalently [1].
"The MFENCE instruction establishes a memory fence for both loads and
stores" [2].
[1] linux/arch/x86/include/asm/barrier.h
[2] Intel® 64 and IA-32 Architectures Software Developer’s Manual
Signed-off-by: Philip Oberfichtner <pro@denx.de>
---
arch/x86/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 5efb2e1b21..936ad6f588 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -244,6 +244,7 @@ static inline void sync(void)
* have some advantages to use them instead of the simple one here.
*/
#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define mb() __asm__ __volatile__ ("mfence" : : : "memory")
#define __iormb() dmb()
#define __iowmb() dmb()
--
2.39.2
next prev parent reply other threads:[~2024-05-03 8:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-03 8:49 [PATCH 0/5] net: dwc_eth_qos: Add glue driver for Intel MAC Philip Oberfichtner
2024-05-03 8:49 ` Philip Oberfichtner [this message]
2024-05-03 8:49 ` [PATCH 2/5] net: dwc_eth_qos: Fix header to be self-contained Philip Oberfichtner
2024-05-03 8:49 ` [PATCH 3/5] net: dwc_eth_qos: Adapt probe() for PCI devices Philip Oberfichtner
2024-05-03 8:49 ` [PATCH 4/5] net: dwc_eth_qos: Implement bind() " Philip Oberfichtner
2024-05-03 8:49 ` [PATCH 5/5] net: dwc_eth_qos: Add glue driver for Intel MAC Philip Oberfichtner
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