[PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[Minda Chen]

Add Starfive JH7110 Cadence USB driver and related PHY driver.
So the codes can be used in visionfive2 and milkv 7110 board.

The driver is almost the same with kernel driver.

patch1: Add set phy mode function in cdns3 core driver
        which is used by Starfive.

patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
patch4: Cadence USB wrapper driver.
patch5-7 dts, config and maintainers update.

Minda Chen (7):
  usb: cdns3: Set USB PHY mode in cdns3_probe()
  phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
  phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
  usb: cdns: starfive: Add cdns USB driver
  configs: starfive: Add visionfive2 cadence USB configuration
  dts: starfive: Add JH7110 Cadence USB dts node
  MAINTAINERS: Update Starfive visionfive2 maintain files.

 .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
 arch/riscv/dts/jh7110.dtsi                    |  52 +++++
 board/starfive/visionfive2/MAINTAINERS        |   2 +
 configs/starfive_visionfive2_defconfig        |   9 +
 drivers/phy/Kconfig                           |   1 +
 drivers/phy/Makefile                          |   1 +
 drivers/phy/starfive/Kconfig                  |  19 ++
 drivers/phy/starfive/Makefile                 |   7 +
 drivers/phy/starfive/phy-jh7110-pcie.c        | 211 ++++++++++++++++++
 drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
 drivers/usb/cdns3/Kconfig                     |   7 +
 drivers/usb/cdns3/Makefile                    |   2 +
 drivers/usb/cdns3/cdns3-starfive.c            | 184 +++++++++++++++
 drivers/usb/cdns3/core.c                      |  17 ++
 14 files changed, 652 insertions(+)
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
 create mode 100644 drivers/usb/cdns3/cdns3-starfive.c


base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
-- 
2.17.1

[PATCH v1 1/7] usb: cdns3: Set USB PHY mode in cdns3_probe()

[Minda Chen]

USB PHY maybe need to set PHY mode in different USB
dr mode. So translate to generic PHY mode and call
generic_phy_set_mode().

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 drivers/usb/cdns3/core.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 12a741c6ea..c1a61471f9 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -321,6 +321,7 @@ static int cdns3_probe(struct cdns3 *cdns)
 {
 	struct udevice *dev = cdns->dev;
 	int ret;
+	int mode = PHY_MODE_INVALID;
 
 	cdns->xhci_regs = dev_remap_addr_name(dev, "xhci");
 	if (!cdns->xhci_regs)
@@ -372,6 +373,22 @@ static int cdns3_probe(struct cdns3 *cdns)
 	if (ret)
 		return ret;
 
+	if (cdns->dr_mode == USB_DR_MODE_HOST)
+		mode = PHY_MODE_USB_HOST;
+	else if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
+		mode = PHY_MODE_USB_DEVICE;
+	else if (cdns->dr_mode == USB_DR_MODE_OTG)
+		mode = PHY_MODE_USB_OTG;
+
+	if (mode != PHY_MODE_INVALID) {
+		ret = generic_phy_set_mode(&cdns->usb2_phy, mode, 0);
+		if (ret)
+			return ret;
+		ret = generic_phy_set_mode(&cdns->usb3_phy, mode, 0);
+		if (ret)
+			return ret;
+	}
+
 	dev_dbg(dev, "Cadence USB3 core: probe succeed\n");
 
 	return 0;
-- 
2.17.1

Re: [PATCH v1 1/7] usb: cdns3: Set USB PHY mode in cdns3_probe()

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:
> USB PHY maybe need to set PHY mode in different USB
> dr mode. So translate to generic PHY mode and call
> generic_phy_set_mode().
> 
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> ---
>   drivers/usb/cdns3/core.c | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
> index 12a741c6ea..c1a61471f9 100644
> --- a/drivers/usb/cdns3/core.c
> +++ b/drivers/usb/cdns3/core.c
> @@ -321,6 +321,7 @@ static int cdns3_probe(struct cdns3 *cdns)
>   {
>   	struct udevice *dev = cdns->dev;
>   	int ret;
> +	int mode = PHY_MODE_INVALID;

Please swap ret and mode to keep this list sorted.

>   	cdns->xhci_regs = dev_remap_addr_name(dev, "xhci");
>   	if (!cdns->xhci_regs)
> @@ -372,6 +373,22 @@ static int cdns3_probe(struct cdns3 *cdns)
>   	if (ret)
>   		return ret;
>   
> +	if (cdns->dr_mode == USB_DR_MODE_HOST)
> +		mode = PHY_MODE_USB_HOST;
> +	else if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
> +		mode = PHY_MODE_USB_DEVICE;
> +	else if (cdns->dr_mode == USB_DR_MODE_OTG)
> +		mode = PHY_MODE_USB_OTG;
> +
> +	if (mode != PHY_MODE_INVALID) {

Better invert the condition this way to reduce indent:

if (mode == PHY_MODE_INVALID) {
   dev_err(...report the error...);
   return ret;
}

ret = generic_phy_set...

> +		ret = generic_phy_set_mode(&cdns->usb2_phy, mode, 0);
> +		if (ret)
> +			return ret;
> +		ret = generic_phy_set_mode(&cdns->usb3_phy, mode, 0);
> +		if (ret)
> +			return ret;
> +	}
> +
>   	dev_dbg(dev, "Cadence USB3 core: probe succeed\n");
>   
>   	return 0;

[PATCH v1 2/7] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver

[Minda Chen]

Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 drivers/phy/Kconfig                    |   1 +
 drivers/phy/Makefile                   |   1 +
 drivers/phy/starfive/Kconfig           |  13 +++
 drivers/phy/starfive/Makefile          |   6 ++
 drivers/phy/starfive/phy-jh7110-usb2.c | 135 +++++++++++++++++++++++++
 5 files changed, 156 insertions(+)
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 8f767877e7..0c4d63a01f 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -307,5 +307,6 @@ source "drivers/phy/cadence/Kconfig"
 source "drivers/phy/ti/Kconfig"
 source "drivers/phy/qcom/Kconfig"
 source "drivers/phy/renesas/Kconfig"
+source "drivers/phy/starfive/Kconfig"
 
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 7a2b764492..6ac867350c 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -44,3 +44,4 @@ obj-y += cadence/
 obj-y += ti/
 obj-y += qcom/
 obj-y += renesas/
+obj-y += starfive/
diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
new file mode 100644
index 0000000000..5d78fde12e
--- /dev/null
+++ b/drivers/phy/starfive/Kconfig
@@ -0,0 +1,13 @@
+#
+# Phy drivers for Starfive platforms
+#
+
+menu "Starfive PHY driver"
+
+config PHY_STARFIVE_JH7110_USB2
+	bool "Starfive JH7110 USB 2.0 PHY driver"
+	select PHY
+	help
+	  Enable this to support the Starfive USB 2.0 PHY.
+
+endmenu
diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
new file mode 100644
index 0000000000..a405a75e34
--- /dev/null
+++ b/drivers/phy/starfive/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Starfive
+#
+
+obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2)	+= phy-jh7110-usb2.o
diff --git a/drivers/phy/starfive/phy-jh7110-usb2.c b/drivers/phy/starfive/phy-jh7110-usb2.c
new file mode 100644
index 0000000000..ffbd96d721
--- /dev/null
+++ b/drivers/phy/starfive/phy-jh7110-usb2.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * StarFive JH7110 USB 2.0 PHY driver
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ * Author: Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <errno.h>
+#include <generic-phy.h>
+#include <regmap.h>
+#include <soc.h>
+#include <syscon.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+
+#define USB_LS_KEEPALIVE_OFF		0x4
+#define USB_LS_KEEPALIVE_ENABLE		BIT(4)
+
+struct jh7110_usb2_phy {
+	struct phy *phy;
+	void __iomem *regs;
+	struct clk *usb_125m_clk;
+	struct clk *app_125m;
+	enum phy_mode mode;
+};
+
+static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
+{
+	unsigned int val;
+
+	/* Host mode enable the LS speed keep-alive signal */
+	val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
+	if (set)
+		val |= USB_LS_KEEPALIVE_ENABLE;
+	else
+		val &= ~USB_LS_KEEPALIVE_ENABLE;
+
+	writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);
+}
+
+static int usb2_phy_set_mode(struct phy *_phy,
+			     enum phy_mode mode, int submode)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+	switch (mode) {
+	case PHY_MODE_USB_HOST:
+	case PHY_MODE_USB_DEVICE:
+	case PHY_MODE_USB_OTG:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (mode != phy->mode) {
+		dev_dbg(dev, "Changing phy to %d\n", mode);
+		phy->mode = mode;
+		usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
+	}
+
+	return 0;
+}
+
+static int jh7110_usb2_phy_init(struct phy *_phy)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	ret = clk_prepare_enable(phy->app_125m);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int jh7110_usb2_phy_exit(struct phy *_phy)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+	clk_disable_unprepare(phy->app_125m);
+
+	return 0;
+}
+
+struct phy_ops jh7110_usb2_phy_ops = {
+	.init     = jh7110_usb2_phy_init,
+	.exit     = jh7110_usb2_phy_exit,
+	.set_mode = usb2_phy_set_mode,
+};
+
+int jh7110_usb2_phy_probe(struct udevice *dev)
+{
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+	phy->regs = dev_read_addr_ptr(dev);
+
+	if (!phy->regs)
+		return -EINVAL;
+
+	phy->usb_125m_clk = devm_clk_get(dev, "125m");
+	if (IS_ERR(phy->usb_125m_clk)) {
+		dev_err(dev, "Failed to get 125m clock\n");
+		return PTR_ERR(phy->usb_125m_clk);
+	}
+
+	phy->app_125m = devm_clk_get(dev, "app_125m");
+	if (IS_ERR(phy->app_125m)) {
+		dev_err(dev, "Failed to get app 125m clock\n");
+		return PTR_ERR(phy->app_125m);
+	}
+
+	return 0;
+}
+
+static const struct udevice_id jh7110_usb2_phy[] = {
+	{ .compatible = "starfive,jh7110-usb-phy"},
+	{},
+};
+
+U_BOOT_DRIVER(jh7110_usb2_phy) = {
+	.name = "jh7110_usb2_phy",
+	.id = UCLASS_PHY,
+	.of_match = jh7110_usb2_phy,
+	.probe = jh7110_usb2_phy_probe,
+	.ops = &jh7110_usb2_phy_ops,
+	.priv_auto	= sizeof(struct jh7110_usb2_phy),
+};
-- 
2.17.1

Re: [PATCH v1 2/7] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

[...]

> diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
> new file mode 100644
> index 0000000000..a405a75e34
> --- /dev/null
> +++ b/drivers/phy/starfive/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2023 Starfive

2024 instead of 2023, please fix globally.

> +#
> +
> +obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2)	+= phy-jh7110-usb2.o
> diff --git a/drivers/phy/starfive/phy-jh7110-usb2.c b/drivers/phy/starfive/phy-jh7110-usb2.c
> new file mode 100644
> index 0000000000..ffbd96d721
> --- /dev/null
> +++ b/drivers/phy/starfive/phy-jh7110-usb2.c

[...]

> +static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
> +{
> +	unsigned int val;
> +
> +	/* Host mode enable the LS speed keep-alive signal */
> +	val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
> +	if (set)
> +		val |= USB_LS_KEEPALIVE_ENABLE;
> +	else
> +		val &= ~USB_LS_KEEPALIVE_ENABLE;
> +
> +	writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);

This is clrsetbits_le32(), use it.

> +}
> +
> +static int usb2_phy_set_mode(struct phy *_phy,
> +			     enum phy_mode mode, int submode)
> +{
> +	struct udevice *dev = _phy->dev;
> +	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +
> +	switch (mode) {
> +	case PHY_MODE_USB_HOST:
> +	case PHY_MODE_USB_DEVICE:
> +	case PHY_MODE_USB_OTG:
> +		break;
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	if (mode != phy->mode) {

Reduce indent this way:

if (mode == phy->mode)
   return 0;

... do mode switch stuff ...
return 0;

> +		dev_dbg(dev, "Changing phy to %d\n", mode);
> +		phy->mode = mode;
> +		usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
> +	}
> +
> +	return 0;
> +}
> +
> +static int jh7110_usb2_phy_init(struct phy *_phy)
> +{
> +	struct udevice *dev = _phy->dev;
> +	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +	int ret;
> +
> +	ret = clk_prepare_enable(phy->app_125m);

return clk_prepare_...(); is just fine

> +	if (ret)
> +		return ret;
> +
> +	return 0;
> +}
> +
> +static int jh7110_usb2_phy_exit(struct phy *_phy)
> +{
> +	struct udevice *dev = _phy->dev;
> +	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +
> +	clk_disable_unprepare(phy->app_125m);
> +
> +	return 0;
> +}
> +
> +struct phy_ops jh7110_usb2_phy_ops = {
> +	.init     = jh7110_usb2_phy_init,
> +	.exit     = jh7110_usb2_phy_exit,
> +	.set_mode = usb2_phy_set_mode,
> +};
> +
> +int jh7110_usb2_phy_probe(struct udevice *dev)
> +{
> +	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +
> +	phy->regs = dev_read_addr_ptr(dev);
> +

Drop extra newline.

> +	if (!phy->regs)
> +		return -EINVAL;

[...]

[PATCH v1 3/7] phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver

[Minda Chen]

Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 drivers/phy/starfive/Kconfig           |   6 +
 drivers/phy/starfive/Makefile          |   1 +
 drivers/phy/starfive/phy-jh7110-pcie.c | 211 +++++++++++++++++++++++++
 3 files changed, 218 insertions(+)
 create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c

diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
index 5d78fde12e..eaebb2b47d 100644
--- a/drivers/phy/starfive/Kconfig
+++ b/drivers/phy/starfive/Kconfig
@@ -4,6 +4,12 @@
 
 menu "Starfive PHY driver"
 
+config PHY_STARFIVE_JH7110_PCIE
+        bool "Starfive JH7110 PCIe 2.0 PHY driver"
+        select PHY
+        help
+          Enable this to support the Starfive PCIE 2.0/USB 3.0 PHY.
+
 config PHY_STARFIVE_JH7110_USB2
 	bool "Starfive JH7110 USB 2.0 PHY driver"
 	select PHY
diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
index a405a75e34..82f25aa21b 100644
--- a/drivers/phy/starfive/Makefile
+++ b/drivers/phy/starfive/Makefile
@@ -3,4 +3,5 @@
 # Copyright (C) 2023 Starfive
 #
 
+obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE)	+= phy-jh7110-pcie.o
 obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2)	+= phy-jh7110-usb2.o
diff --git a/drivers/phy/starfive/phy-jh7110-pcie.c b/drivers/phy/starfive/phy-jh7110-pcie.c
new file mode 100644
index 0000000000..e875d6e0f4
--- /dev/null
+++ b/drivers/phy/starfive/phy-jh7110-pcie.c
@@ -0,0 +1,211 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * StarFive JH7110 PCIe 2.0 PHY driver
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ * Author: Minda Chen <minda.chen@starfivetech.com>
+ */
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <errno.h>
+#include <generic-phy.h>
+#include <regmap.h>
+#include <soc.h>
+#include <syscon.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+
+#define PCIE_KVCO_LEVEL_OFF		0x28
+#define PCIE_USB3_PHY_PLL_CTL_OFF	0x7c
+#define PCIE_KVCO_TUNE_SIGNAL_OFF	0x80
+#define PCIE_USB3_PHY_ENABLE		BIT(4)
+#define PHY_KVCO_FINE_TUNE_LEVEL	0x91
+#define PHY_KVCO_FINE_TUNE_SIGNALS	0xc
+
+#define USB_PDRSTN_SPLIT		BIT(17)
+
+#define PCIE_PHY_MODE			BIT(20)
+#define PCIE_PHY_MODE_MASK		GENMASK(21, 20)
+#define PCIE_USB3_BUS_WIDTH_MASK	GENMASK(3, 2)
+#define PCIE_USB3_BUS_WIDTH		BIT(3)
+#define PCIE_USB3_RATE_MASK		GENMASK(6, 5)
+#define PCIE_USB3_RX_STANDBY_MASK	BIT(7)
+#define PCIE_USB3_PHY_ENABLE		BIT(4)
+
+struct jh7110_pcie_phy {
+	struct phy *phy;
+	struct regmap *stg_syscon;
+	struct regmap *sys_syscon;
+	void __iomem *regs;
+	u32 sys_phy_connect;
+	u32 stg_pcie_mode;
+	u32 stg_pcie_usb;
+	enum phy_mode mode;
+};
+
+static int phy_usb3_mode_set(struct jh7110_pcie_phy *data)
+{
+	if (!data->stg_syscon || !data->sys_syscon) {
+		dev_err(data->phy->dev, "doesn't support usb3 mode\n");
+		return -EINVAL;
+	}
+
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
+			   PCIE_PHY_MODE_MASK, PCIE_PHY_MODE);
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+			   PCIE_USB3_BUS_WIDTH_MASK, 0);
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+			   PCIE_USB3_PHY_ENABLE, PCIE_USB3_PHY_ENABLE);
+
+	/* Connect usb 3.0 phy mode */
+	regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
+			   USB_PDRSTN_SPLIT, 0);
+
+	/* Configuare spread-spectrum mode: down-spread-spectrum */
+	writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
+
+	return 0;
+}
+
+static void phy_pcie_mode_set(struct jh7110_pcie_phy *data)
+{
+	u32 val;
+
+	/* default is PCIe mode */
+	if (!data->stg_syscon || !data->sys_syscon)
+		return;
+
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
+			   PCIE_PHY_MODE_MASK, 0);
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+			   PCIE_USB3_BUS_WIDTH_MASK,
+			   PCIE_USB3_BUS_WIDTH);
+	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+			   PCIE_USB3_PHY_ENABLE, 0);
+
+	regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
+			   USB_PDRSTN_SPLIT, 0);
+
+	val = readl(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
+	val &= ~PCIE_USB3_PHY_ENABLE;
+	writel(val, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
+}
+
+static void phy_kvco_gain_set(struct jh7110_pcie_phy *phy)
+{
+	/* PCIe Multi-PHY PLL KVCO Gain fine tune settings: */
+	writel(PHY_KVCO_FINE_TUNE_LEVEL, phy->regs + PCIE_KVCO_LEVEL_OFF);
+	writel(PHY_KVCO_FINE_TUNE_SIGNALS, phy->regs + PCIE_KVCO_TUNE_SIGNAL_OFF);
+}
+
+static int jh7110_pcie_phy_set_mode(struct phy *_phy,
+				    enum phy_mode mode, int submode)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_pcie_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	if (mode == phy->mode)
+		return 0;
+
+	switch (mode) {
+	case PHY_MODE_USB_HOST:
+	case PHY_MODE_USB_DEVICE:
+	case PHY_MODE_USB_OTG:
+		ret = phy_usb3_mode_set(phy);
+		if (ret)
+			return ret;
+		break;
+	case PHY_MODE_PCIE:
+		phy_pcie_mode_set(phy);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	dev_dbg(_phy->dev, "Changing phy mode to %d\n", mode);
+	phy->mode = mode;
+
+	return 0;
+}
+
+static const struct phy_ops jh7110_pcie_phy_ops = {
+	.set_mode	= jh7110_pcie_phy_set_mode,
+};
+
+static int starfive_pcie_phy_get_syscon(struct udevice *dev)
+{
+	struct jh7110_pcie_phy *phy = dev_get_priv(dev);
+	struct ofnode_phandle_args sys_phandle, stg_phandle;
+	int ret;
+
+	/* get corresponding syscon phandle */
+	ret = dev_read_phandle_with_args(dev, "starfive,sys-syscon", NULL, 1, 0,
+					 &sys_phandle);
+
+	if (ret < 0) {
+		dev_err(dev, "Can't get sys cfg phandle: %d\n", ret);
+		return ret;
+	}
+
+	ret = dev_read_phandle_with_args(dev, "starfive,stg-syscon", NULL, 2, 0,
+					 &stg_phandle);
+
+	if (ret < 0) {
+		dev_err(dev, "Can't get stg cfg phandle: %d\n", ret);
+		return ret;
+	}
+
+	phy->sys_syscon = syscon_node_to_regmap(sys_phandle.node);
+	if (!IS_ERR_OR_NULL(phy->sys_syscon)) {
+		/* get syscon register offset */
+		phy->sys_phy_connect = sys_phandle.args[0];
+	} else {
+		phy->sys_syscon = NULL;
+	}
+
+	phy->stg_syscon = syscon_node_to_regmap(stg_phandle.node);
+	if (!IS_ERR_OR_NULL(phy->stg_syscon)) {
+		phy->stg_pcie_mode = stg_phandle.args[0];
+		phy->stg_pcie_usb = stg_phandle.args[1];
+	} else {
+		phy->stg_syscon = NULL;
+	}
+
+	return 0;
+}
+
+int jh7110_pcie_phy_probe(struct udevice *dev)
+{
+	struct jh7110_pcie_phy *phy = dev_get_priv(dev);
+	int rc;
+
+	phy->regs = dev_read_addr_ptr(dev);
+
+	if (!phy->regs)
+		return -EINVAL;
+
+	rc = starfive_pcie_phy_get_syscon(dev);
+	if (rc)
+		return rc;
+
+	phy_kvco_gain_set(phy);
+
+	return 0;
+}
+
+static const struct udevice_id jh7110_pcie_phy[] = {
+	{ .compatible = "starfive,jh7110-pcie-phy"},
+	{},
+};
+
+U_BOOT_DRIVER(jh7110_pcie_phy) = {
+	.name = "jh7110_pcie_phy",
+	.id = UCLASS_PHY,
+	.of_match = jh7110_pcie_phy,
+	.probe = jh7110_pcie_phy_probe,
+	.ops = &jh7110_pcie_phy_ops,
+	.priv_auto	= sizeof(struct jh7110_pcie_phy),
+};
+
-- 
2.17.1

Re: [PATCH v1 3/7] phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

Fix up the copyrights to year 2024 globally please.

[...]

> +static int phy_usb3_mode_set(struct jh7110_pcie_phy *data)
> +{

Can this phy_usb3_mode_set and phy_pcie_mode_set be unified into single 
function with parameter to select usb3/pcie mode instead ?

> +	if (!data->stg_syscon || !data->sys_syscon) {
> +		dev_err(data->phy->dev, "doesn't support usb3 mode\n");
> +		return -EINVAL;
> +	}
> +
> +	regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
> +			   PCIE_PHY_MODE_MASK, PCIE_PHY_MODE);
> +	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +			   PCIE_USB3_BUS_WIDTH_MASK, 0);
> +	regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +			   PCIE_USB3_PHY_ENABLE, PCIE_USB3_PHY_ENABLE);
> +
> +	/* Connect usb 3.0 phy mode */
> +	regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
> +			   USB_PDRSTN_SPLIT, 0);
> +
> +	/* Configuare spread-spectrum mode: down-spread-spectrum */
> +	writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
> +
> +	return 0;
> +}

[...]

> +int jh7110_pcie_phy_probe(struct udevice *dev)
> +{
> +	struct jh7110_pcie_phy *phy = dev_get_priv(dev);
> +	int rc;
> +
> +	phy->regs = dev_read_addr_ptr(dev);
> +

Drop extra newline here.

> +	if (!phy->regs)
> +		return -EINVAL;

[...]

[PATCH v1 4/7] usb: cdns: starfive: Add cdns USB driver

[Minda Chen]

Add cdns USB3 wrapper driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 drivers/usb/cdns3/Kconfig          |   7 ++
 drivers/usb/cdns3/Makefile         |   2 +
 drivers/usb/cdns3/cdns3-starfive.c | 184 +++++++++++++++++++++++++++++
 3 files changed, 193 insertions(+)
 create mode 100644 drivers/usb/cdns3/cdns3-starfive.c

diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
index 35b61497d9..f8f363982b 100644
--- a/drivers/usb/cdns3/Kconfig
+++ b/drivers/usb/cdns3/Kconfig
@@ -55,4 +55,11 @@ config USB_CDNS3_TI
 	help
 	  Say 'Y' here if you are building for Texas Instruments
 	  platforms that contain Cadence USB3 controller core. E.g.: J721e.
+
+config USB_CDNS3_STARFIVE
+	tristate "Cadence USB3 support on Starfive platforms"
+	default USB_CDNS3
+	help
+	  Say 'Y' here if you are building for Starfive platforms
+	  that contain Cadence USB3 controller core. E.g.: JH7110.
 endif
diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
index 18d7190755..03d1eadb2f 100644
--- a/drivers/usb/cdns3/Makefile
+++ b/drivers/usb/cdns3/Makefile
@@ -9,3 +9,5 @@ cdns3-$(CONFIG_$(SPL_)USB_CDNS3_GADGET)	+= gadget.o ep0.o
 cdns3-$(CONFIG_$(SPL_)USB_CDNS3_HOST)	+= host.o
 
 obj-$(CONFIG_USB_CDNS3_TI)		+= cdns3-ti.o
+
+obj-$(CONFIG_USB_CDNS3_STARFIVE)	+= cdns3-starfive.o
diff --git a/drivers/usb/cdns3/cdns3-starfive.c b/drivers/usb/cdns3/cdns3-starfive.c
new file mode 100644
index 0000000000..efda47e2a5
--- /dev/null
+++ b/drivers/usb/cdns3/cdns3-starfive.c
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * cdns3-starfive.c - StarFive specific Glue layer for Cadence USB Controller
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ *
+ * Author:	Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/usb/otg.h>
+#include <reset.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <malloc.h>
+
+#include "core.h"
+
+#define USB_STRAP_HOST			BIT(17)
+#define USB_STRAP_DEVICE		BIT(18)
+#define USB_STRAP_MASK			GENMASK(18, 16)
+
+#define USB_SUSPENDM_HOST		BIT(19)
+#define USB_SUSPENDM_MASK		BIT(19)
+
+#define USB_MISC_CFG_MASK		GENMASK(23, 20)
+#define USB_SUSPENDM_BYPS		BIT(20)
+#define USB_PLL_EN			BIT(22)
+#define USB_REFCLK_MODE			BIT(23)
+
+struct cdns_starfive {
+	struct udevice *dev;
+	struct regmap *stg_syscon;
+	struct reset_ctl_bulk resets;
+	struct clk_bulk clks;
+	u32 stg_usb_mode;
+	enum usb_dr_mode mode;
+};
+
+static void cdns_mode_init(struct cdns_starfive *data, enum usb_dr_mode mode)
+{
+	regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+			   USB_MISC_CFG_MASK,
+			   USB_SUSPENDM_BYPS | USB_PLL_EN | USB_REFCLK_MODE);
+
+	switch (mode) {
+	case USB_DR_MODE_HOST:
+		regmap_update_bits(data->stg_syscon,
+				   data->stg_usb_mode,
+				   USB_STRAP_MASK,
+				   USB_STRAP_HOST);
+		regmap_update_bits(data->stg_syscon,
+				   data->stg_usb_mode,
+				   USB_SUSPENDM_MASK,
+				   USB_SUSPENDM_HOST);
+		break;
+
+	case USB_DR_MODE_PERIPHERAL:
+		regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+				   USB_STRAP_MASK, USB_STRAP_DEVICE);
+		regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+				   USB_SUSPENDM_MASK, 0);
+		break;
+	default:
+		break;
+	}
+}
+
+static void cdns_clk_rst_deinit(struct cdns_starfive *data)
+{
+	reset_assert_bulk(&data->resets);
+	clk_disable_bulk(&data->clks);
+}
+
+static int cdns_clk_rst_init(struct cdns_starfive *data)
+{
+	int ret;
+
+	ret = clk_get_bulk(data->dev, &data->clks);
+	if (ret)
+		return ret;
+
+	ret = reset_get_bulk(data->dev, &data->resets);
+	if (ret)
+		goto err_clk;
+
+	ret = clk_enable_bulk(&data->clks);
+	if (ret)
+		goto err_en_clk;
+
+	ret = reset_deassert_bulk(&data->resets);
+	if (ret)
+		goto err_reset;
+
+	return 0;
+
+err_reset:
+	clk_disable_bulk(&data->clks);
+err_en_clk:
+	reset_release_bulk(&data->resets);
+err_clk:
+	clk_release_bulk(&data->clks);
+
+	return ret;
+}
+
+static int cdns_starfive_get_syscon(struct cdns_starfive *data)
+{
+	struct ofnode_phandle_args phandle;
+	int ret;
+
+	ret = dev_read_phandle_with_args(data->dev, "starfive,stg-syscon", NULL, 1, 0,
+					 &phandle);
+
+	if (ret < 0) {
+		dev_err(data->dev, "Can't get stg cfg phandle: %d\n", ret);
+		return ret;
+	}
+
+	data->stg_syscon = syscon_node_to_regmap(phandle.node);
+	if (IS_ERR(data->stg_syscon)) {
+		dev_err(data->dev, "fail to get regmap: %d\n", (int)PTR_ERR(data->stg_syscon));
+		return PTR_ERR(data->stg_syscon);
+	}
+	data->stg_usb_mode = phandle.args[0];
+
+	return 0;
+}
+
+static int cdns_starfive_probe(struct udevice *dev)
+{
+	struct cdns_starfive *data = dev_get_plat(dev);
+	enum usb_dr_mode dr_mode;
+	ofnode node;
+	int ret;
+
+	data->dev = dev;
+
+	ret = cdns_starfive_get_syscon(data);
+
+	if (ret)
+		return ret;
+
+	node = ofnode_by_compatible(dev_ofnode(dev), "cdns,usb3");
+	if (!ofnode_valid(node)) {
+		dev_err(dev, "failed to get usb node\n");
+		return -ENODEV;
+	}
+
+	dr_mode = usb_get_dr_mode(node);
+
+	data->mode = dr_mode;
+	cdns_mode_init(data, dr_mode);
+
+	return cdns_clk_rst_init(data);
+}
+
+static int cdns_starfive_remove(struct udevice *dev)
+{
+	struct cdns_starfive *data = dev_get_plat(dev);
+
+	cdns_clk_rst_deinit(data);
+	return 0;
+}
+
+static const struct udevice_id cdns_starfive_of_match[] = {
+	{ .compatible = "starfive,jh7110-usb", },
+	{},
+};
+
+U_BOOT_DRIVER(cdns_starfive) = {
+	.name = "cdns-starfive",
+	.id = UCLASS_NOP,
+	.of_match = cdns_starfive_of_match,
+	.bind = cdns3_bind,
+	.probe = cdns_starfive_probe,
+	.remove = cdns_starfive_remove,
+	.plat_auto	= sizeof(struct cdns_starfive),
+	.flags = DM_FLAG_OS_PREPARE,
+};
-- 
2.17.1

Re: [PATCH v1 4/7] usb: cdns: starfive: Add cdns USB driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

[...]

> +static void cdns_mode_init(struct cdns_starfive *data, enum usb_dr_mode mode)
> +{
> +	regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +			   USB_MISC_CFG_MASK,
> +			   USB_SUSPENDM_BYPS | USB_PLL_EN | USB_REFCLK_MODE);
> +
> +	switch (mode) {
> +	case USB_DR_MODE_HOST:
> +		regmap_update_bits(data->stg_syscon,
> +				   data->stg_usb_mode,
> +				   USB_STRAP_MASK,
> +				   USB_STRAP_HOST);
> +		regmap_update_bits(data->stg_syscon,
> +				   data->stg_usb_mode,
> +				   USB_SUSPENDM_MASK,
> +				   USB_SUSPENDM_HOST);

Can you deduplicate thse regmap_update_bits at the end of this function 
? Set a variable to USB_STRAP_HOST and another to USB_SUSPENDM_HOST 
here, set the same variables to USB_STRAP_DEVICE/0 below, and then call 
regmap_update_bits() with these variables at the end of this function once.

> +		break;
> +
> +	case USB_DR_MODE_PERIPHERAL:
> +		regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +				   USB_STRAP_MASK, USB_STRAP_DEVICE);
> +		regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +				   USB_SUSPENDM_MASK, 0);
> +		break;
> +	default:
> +		break;
> +	}
> +}

[...]

[PATCH v1 5/7] configs: starfive: Add visionfive2 cadence USB configuration

[Minda Chen]

Add cadence USB confiuration.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 configs/starfive_visionfive2_defconfig | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index 3bbd1dbd67..444ddd508d 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -68,6 +68,7 @@ CONFIG_SYS_EEPROM_SIZE=512
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
 CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BIND is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
@@ -111,6 +112,8 @@ CONFIG_NVME_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_REGION_MULTI_ENTRY=y
 CONFIG_PCIE_STARFIVE_JH7110=y
+CONFIG_PHY_STARFIVE_JH7110_PCIE=y
+CONFIG_PHY_STARFIVE_JH7110_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y
@@ -126,13 +129,19 @@ CONFIG_CADENCE_QSPI=y
 CONFIG_SYSRESET=y
 CONFIG_TIMER_EARLY=y
 CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_PCI=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_PCI=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_PCI=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+# CONFIG_USB_CDNS3_TI is not set
 CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
 # CONFIG_WATCHDOG is not set
 # CONFIG_WATCHDOG_AUTOSTART is not set
 CONFIG_WDT=y
-- 
2.17.1

[PATCH v1 6/7] dts: starfive: Add JH7110 Cadence USB dts node

[Minda Chen]

Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 .../dts/jh7110-starfive-visionfive-2.dtsi     |  5 ++
 arch/riscv/dts/jh7110.dtsi                    | 52 +++++++++++++++++++
 2 files changed, 57 insertions(+)

diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index e11babc1cd..44785bbee3 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -378,3 +378,8 @@
 		};
 	};
 };
+
+&usb_cdns3 {
+	dr_mode = "peripheral";
+	status = "okay";
+};
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 2cdc683d49..1eee924e1d 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -371,6 +371,58 @@
 			status = "disabled";
 		};
 
+		usb0: usb@10100000 {
+			compatible = "starfive,jh7110-usb";
+			ranges = <0x0 0x0 0x10100000 0x100000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			starfive,stg-syscon = <&stg_syscon 0x4>;
+			clocks = <&stgcrg JH7110_STGCLK_USB_LPM>,
+				 <&stgcrg JH7110_STGCLK_USB_STB>,
+				 <&stgcrg JH7110_STGCLK_USB_APB>,
+				 <&stgcrg JH7110_STGCLK_USB_AXI>,
+				 <&stgcrg JH7110_STGCLK_USB_UTMI_APB>;
+			clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
+			resets = <&stgcrg JH7110_STGRST_USB_PWRUP>,
+				 <&stgcrg JH7110_STGRST_USB_APB>,
+				 <&stgcrg JH7110_STGRST_USB_AXI>,
+				 <&stgcrg JH7110_STGRST_USB_UTMI_APB>;
+			reset-names = "pwrup", "apb", "axi", "utmi_apb";
+
+			usb_cdns3: usb@0 {
+				compatible = "cdns,usb3";
+				reg = <0x0 0x10000>,
+				      <0x10000 0x10000>,
+				      <0x20000 0x10000>;
+				reg-names = "otg", "xhci", "dev";
+				interrupts = <100>, <108>, <110>;
+				interrupt-names = "host", "peripheral", "otg";
+				phys = <&usbphy0>;
+				phy-names = "cdns3,usb2-phy";
+			};
+		};
+
+		usbphy0: phy@10200000 {
+			compatible = "starfive,jh7110-usb-phy";
+			reg = <0x0 0x10200000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_USB_125M>,
+				 <&stgcrg JH7110_STGCLK_USB_APP_125>;
+			clock-names = "125m", "app_125m";
+			#phy-cells = <0>;
+		};
+
+		pciephy0: phy@10210000 {
+			compatible = "starfive,jh7110-pcie-phy";
+			reg = <0x0 0x10210000 0x0 0x10000>;
+			#phy-cells = <0>;
+		};
+
+		pciephy1: phy@10220000 {
+			compatible = "starfive,jh7110-pcie-phy";
+			reg = <0x0 0x10220000 0x0 0x10000>;
+			#phy-cells = <0>;
+		};
+
 		stgcrg: clock-controller@10230000 {
 			compatible = "starfive,jh7110-stgcrg";
 			reg = <0x0 0x10230000 0x0 0x10000>;
-- 
2.17.1

[PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

[Minda Chen]

Add USB related files to Starfive visionfive2 MAINTAINERS.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 board/starfive/visionfive2/MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/starfive/visionfive2/MAINTAINERS b/board/starfive/visionfive2/MAINTAINERS
index d7f638f9b4..1faf83f581 100644
--- a/board/starfive/visionfive2/MAINTAINERS
+++ b/board/starfive/visionfive2/MAINTAINERS
@@ -6,3 +6,5 @@ F:	board/starfive/visionfive2/
 F:	include/configs/starfive-visionfive2.h
 F:	configs/starfive_visionfive2_defconfig
 F:	drivers/pci/pcie_starfive_jh7110.c
+F:	drivers/phy/starfive/
+F:	drivers/usb/cdns3/cdns3-starfive.c
-- 
2.17.1

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:
> Add USB related files to Starfive visionfive2 MAINTAINERS.
> 
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> ---
>   board/starfive/visionfive2/MAINTAINERS | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/board/starfive/visionfive2/MAINTAINERS b/board/starfive/visionfive2/MAINTAINERS
> index d7f638f9b4..1faf83f581 100644
> --- a/board/starfive/visionfive2/MAINTAINERS
> +++ b/board/starfive/visionfive2/MAINTAINERS
> @@ -6,3 +6,5 @@ F:	board/starfive/visionfive2/
>   F:	include/configs/starfive-visionfive2.h
>   F:	configs/starfive_visionfive2_defconfig
>   F:	drivers/pci/pcie_starfive_jh7110.c
> +F:	drivers/phy/starfive/
> +F:	drivers/usb/cdns3/cdns3-starfive.c

Thanks !

Reviewed-by: Marek Vasut <marex@denx.de>

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

[Minda Chen]

> 
> On 5/4/24 5:03 PM, Minda Chen wrote:
> > Add USB related files to Starfive visionfive2 MAINTAINERS.
> >
> > Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> > ---
> >   board/starfive/visionfive2/MAINTAINERS | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/board/starfive/visionfive2/MAINTAINERS
> b/board/starfive/visionfive2/MAINTAINERS
> > index d7f638f9b4..1faf83f581 100644
> > --- a/board/starfive/visionfive2/MAINTAINERS
> > +++ b/board/starfive/visionfive2/MAINTAINERS
> > @@ -6,3 +6,5 @@ F:	board/starfive/visionfive2/
> >   F:	include/configs/starfive-visionfive2.h
> >   F:	configs/starfive_visionfive2_defconfig
> >   F:	drivers/pci/pcie_starfive_jh7110.c
> > +F:	drivers/phy/starfive/
> > +F:	drivers/usb/cdns3/cdns3-starfive.c
> 
> Thanks !
> 
> Reviewed-by: Marek Vasut <marex@denx.de>

Thanks for reviewing the patch set!  I will follow the comments.

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

[Marek Vasut]

On 5/17/24 11:47 AM, Minda Chen wrote:
> 
>>
>> On 5/4/24 5:03 PM, Minda Chen wrote:
>>> Add USB related files to Starfive visionfive2 MAINTAINERS.
>>>
>>> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
>>> ---
>>>    board/starfive/visionfive2/MAINTAINERS | 2 ++
>>>    1 file changed, 2 insertions(+)
>>>
>>> diff --git a/board/starfive/visionfive2/MAINTAINERS
>> b/board/starfive/visionfive2/MAINTAINERS
>>> index d7f638f9b4..1faf83f581 100644
>>> --- a/board/starfive/visionfive2/MAINTAINERS
>>> +++ b/board/starfive/visionfive2/MAINTAINERS
>>> @@ -6,3 +6,5 @@ F:	board/starfive/visionfive2/
>>>    F:	include/configs/starfive-visionfive2.h
>>>    F:	configs/starfive_visionfive2_defconfig
>>>    F:	drivers/pci/pcie_starfive_jh7110.c
>>> +F:	drivers/phy/starfive/
>>> +F:	drivers/usb/cdns3/cdns3-starfive.c
>>
>> Thanks !
>>
>> Reviewed-by: Marek Vasut <marex@denx.de>
> 
> Thanks for reviewing the patch set!  I will follow the comments.

Thank you !

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[E Shattow]

Hi, there is a compile warning. I don't know why.

On Sat, May 4, 2024 at 8:04 AM Minda Chen <minda.chen@starfivetech.com> wrote:
>
> Add Starfive JH7110 Cadence USB driver and related PHY driver.
> So the codes can be used in visionfive2 and milkv 7110 board.
>
> The driver is almost the same with kernel driver.
>
> patch1: Add set phy mode function in cdns3 core driver
>         which is used by Starfive.
>
> patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> patch4: Cadence USB wrapper driver.
> patch5-7 dts, config and maintainers update.
>
> Minda Chen (7):
>   usb: cdns3: Set USB PHY mode in cdns3_probe()
>   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
>   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
>   usb: cdns: starfive: Add cdns USB driver
>   configs: starfive: Add visionfive2 cadence USB configuration
>   dts: starfive: Add JH7110 Cadence USB dts node
>   MAINTAINERS: Update Starfive visionfive2 maintain files.
>
>  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
>  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
>  board/starfive/visionfive2/MAINTAINERS        |   2 +
>  configs/starfive_visionfive2_defconfig        |   9 +
>  drivers/phy/Kconfig                           |   1 +
>  drivers/phy/Makefile                          |   1 +
>  drivers/phy/starfive/Kconfig                  |  19 ++
>  drivers/phy/starfive/Makefile                 |   7 +
>  drivers/phy/starfive/phy-jh7110-pcie.c        | 211 ++++++++++++++++++
>  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
>  drivers/usb/cdns3/Kconfig                     |   7 +
>  drivers/usb/cdns3/Makefile                    |   2 +
>  drivers/usb/cdns3/cdns3-starfive.c            | 184 +++++++++++++++
>  drivers/usb/cdns3/core.c                      |  17 ++
>  14 files changed, 652 insertions(+)
>  create mode 100644 drivers/phy/starfive/Kconfig
>  create mode 100644 drivers/phy/starfive/Makefile
>  create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
>  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
>  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
>
>
> base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> --
> 2.17.1
>

The compile warning as follows:

In file included from
/home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
/home/user/source/u-boot.git/include/linux/bitmap.h: In function
‘bitmap_find_next_zero_area’:
/home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
implicit declaration of function ‘find_next_zero_bit’; did you mean
‘find_next_bit’? [-Wimplicit-function-declaration]
  170 |         index = find_next_zero_bit(map, size, start);
      |                 ^~~~~~~~~~~~~~~~~~
      |                 find_next_bit
  CC      drivers/usb/cdns3/ep0.o
In file included from
/home/user/source/u-boot.git/include/linux/usb/composite.h:26,
                 from /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
/home/user/source/u-boot.git/include/linux/bitmap.h: In function
‘bitmap_find_next_zero_area’:
/home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
implicit declaration of function ‘find_next_zero_bit’; did you mean
‘find_next_bit’? [-Wimplicit-function-declaration]
  170 |         index = find_next_zero_bit(map, size, start);
      |                 ^~~~~~~~~~~~~~~~~~
      |                 find_next_bit


Is this something missing in the patch series?

-E

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[Minda Chen]

> -----邮件原件-----
> 发件人: E Shattow <lucent@gmail.com>
> 发送时间: 2024年5月20日 13:06
> 收件人: Minda Chen <minda.chen@starfivetech.com>
> 抄送: Marek Vasut <marex@denx.de>; Tom Rini <trini@konsulko.com>; Roger
> Quadros <rogerq@kernel.org>; Neil Armstrong <neil.armstrong@linaro.org>;
> Alexey Romanov <avromanov@salutedevices.com>; Sumit Garg
> <sumit.garg@linaro.org>; Mark Kettenis <kettenis@openbsd.org>; Nishanth
> Menon <nm@ti.com>; Rick Chen <rick@andestech.com>; Leo Yu-Chi Liang
> <ycliang@andestech.com>; u-boot@lists.denx.de; Heinrich Schuchardt
> <xypron.glpk@gmx.de>; Simon Glass <sjg@chromium.org>
> 主题: Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver
> 
> Hi, there is a compile warning. I don't know why.
> 
> On Sat, May 4, 2024 at 8:04 AM Minda Chen <minda.chen@starfivetech.com>
> wrote:
> >
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and milkv 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > patch1: Add set phy mode function in cdns3 core driver
> >         which is used by Starfive.
> >
> > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > patch4: Cadence USB wrapper driver.
> > patch5-7 dts, config and maintainers update.
> >
> > Minda Chen (7):
> >   usb: cdns3: Set USB PHY mode in cdns3_probe()
> >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> >   usb: cdns: starfive: Add cdns USB driver
> >   configs: starfive: Add visionfive2 cadence USB configuration
> >   dts: starfive: Add JH7110 Cadence USB dts node
> >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> >
> >  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> >  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> >  board/starfive/visionfive2/MAINTAINERS        |   2 +
> >  configs/starfive_visionfive2_defconfig        |   9 +
> >  drivers/phy/Kconfig                           |   1 +
> >  drivers/phy/Makefile                          |   1 +
> >  drivers/phy/starfive/Kconfig                  |  19 ++
> >  drivers/phy/starfive/Makefile                 |   7 +
> >  drivers/phy/starfive/phy-jh7110-pcie.c        | 211
> ++++++++++++++++++
> >  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
> >  drivers/usb/cdns3/Kconfig                     |   7 +
> >  drivers/usb/cdns3/Makefile                    |   2 +
> >  drivers/usb/cdns3/cdns3-starfive.c            | 184 +++++++++++++++
> >  drivers/usb/cdns3/core.c                      |  17 ++
> >  14 files changed, 652 insertions(+)
> >  create mode 100644 drivers/phy/starfive/Kconfig  create mode 100644
> > drivers/phy/starfive/Makefile  create mode 100644
> > drivers/phy/starfive/phy-jh7110-pcie.c
> >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> >
> >
> > base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> > --
> > 2.17.1
> >
> 
> The compile warning as follows:
> 
> In file included from
> /home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
> /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> ‘bitmap_find_next_zero_area’:
> /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> implicit declaration of function ‘find_next_zero_bit’; did you mean
> ‘find_next_bit’? [-Wimplicit-function-declaration]
>   170 |         index = find_next_zero_bit(map, size, start);
>       |                 ^~~~~~~~~~~~~~~~~~
>       |                 find_next_bit
>   CC      drivers/usb/cdns3/ep0.o
> In file included from
> /home/user/source/u-boot.git/include/linux/usb/composite.h:26,
>                  from
> /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
> /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> ‘bitmap_find_next_zero_area’:
> /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> implicit declaration of function ‘find_next_zero_bit’; did you mean
> ‘find_next_bit’? [-Wimplicit-function-declaration]
>   170 |         index = find_next_zero_bit(map, size, start);
>       |                 ^~~~~~~~~~~~~~~~~~
>       |                 find_next_bit
> 
> 
> Is this something missing in the patch series?
> 
> -E

I have not noticed this. I just check this it is risc-v code do not contain "find_next_zero_bit" macro define.

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[E Shattow]

Minda, can you test USB Host function on VisionFive2? I guess that it
is connected to the USB-C port. For the boards with JH7110 and not any
VL805 USB controller this Cadence USB is the only way to have host
USB. It is very much wanted to have host USB. Thanks! -E

On Sun, May 19, 2024 at 11:20 PM Minda Chen <minda.chen@starfivetech.com> wrote:
>
>
>
> > -----邮件原件-----
> > 发件人: E Shattow <lucent@gmail.com>
> > 发送时间: 2024年5月20日 13:06
> > 收件人: Minda Chen <minda.chen@starfivetech.com>
> > 抄送: Marek Vasut <marex@denx.de>; Tom Rini <trini@konsulko.com>; Roger
> > Quadros <rogerq@kernel.org>; Neil Armstrong <neil.armstrong@linaro.org>;
> > Alexey Romanov <avromanov@salutedevices.com>; Sumit Garg
> > <sumit.garg@linaro.org>; Mark Kettenis <kettenis@openbsd.org>; Nishanth
> > Menon <nm@ti.com>; Rick Chen <rick@andestech.com>; Leo Yu-Chi Liang
> > <ycliang@andestech.com>; u-boot@lists.denx.de; Heinrich Schuchardt
> > <xypron.glpk@gmx.de>; Simon Glass <sjg@chromium.org>
> > 主题: Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver
> >
> > Hi, there is a compile warning. I don't know why.
> >
> > On Sat, May 4, 2024 at 8:04 AM Minda Chen <minda.chen@starfivetech.com>
> > wrote:
> > >
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and milkv 7110 board.
> > >
> > > The driver is almost the same with kernel driver.
> > >
> > > patch1: Add set phy mode function in cdns3 core driver
> > >         which is used by Starfive.
> > >
> > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > patch4: Cadence USB wrapper driver.
> > > patch5-7 dts, config and maintainers update.
> > >
> > > Minda Chen (7):
> > >   usb: cdns3: Set USB PHY mode in cdns3_probe()
> > >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > >   usb: cdns: starfive: Add cdns USB driver
> > >   configs: starfive: Add visionfive2 cadence USB configuration
> > >   dts: starfive: Add JH7110 Cadence USB dts node
> > >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> > >
> > >  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> > >  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> > >  board/starfive/visionfive2/MAINTAINERS        |   2 +
> > >  configs/starfive_visionfive2_defconfig        |   9 +
> > >  drivers/phy/Kconfig                           |   1 +
> > >  drivers/phy/Makefile                          |   1 +
> > >  drivers/phy/starfive/Kconfig                  |  19 ++
> > >  drivers/phy/starfive/Makefile                 |   7 +
> > >  drivers/phy/starfive/phy-jh7110-pcie.c        | 211
> > ++++++++++++++++++
> > >  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
> > >  drivers/usb/cdns3/Kconfig                     |   7 +
> > >  drivers/usb/cdns3/Makefile                    |   2 +
> > >  drivers/usb/cdns3/cdns3-starfive.c            | 184 +++++++++++++++
> > >  drivers/usb/cdns3/core.c                      |  17 ++
> > >  14 files changed, 652 insertions(+)
> > >  create mode 100644 drivers/phy/starfive/Kconfig  create mode 100644
> > > drivers/phy/starfive/Makefile  create mode 100644
> > > drivers/phy/starfive/phy-jh7110-pcie.c
> > >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> > >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> > >
> > >
> > > base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> > > --
> > > 2.17.1
> > >
> >
> > The compile warning as follows:
> >
> > In file included from
> > /home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
> > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > ‘bitmap_find_next_zero_area’:
> > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > ‘find_next_bit’? [-Wimplicit-function-declaration]
> >   170 |         index = find_next_zero_bit(map, size, start);
> >       |                 ^~~~~~~~~~~~~~~~~~
> >       |                 find_next_bit
> >   CC      drivers/usb/cdns3/ep0.o
> > In file included from
> > /home/user/source/u-boot.git/include/linux/usb/composite.h:26,
> >                  from
> > /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
> > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > ‘bitmap_find_next_zero_area’:
> > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > ‘find_next_bit’? [-Wimplicit-function-declaration]
> >   170 |         index = find_next_zero_bit(map, size, start);
> >       |                 ^~~~~~~~~~~~~~~~~~
> >       |                 find_next_bit
> >
> >
> > Is this something missing in the patch series?
> >
> > -E
>
> I have not noticed this. I just check this it is risc-v code do not contain "find_next_zero_bit" macro define.

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[Minda Chen]

> 
> Minda, can you test USB Host function on VisionFive2? I guess that it is
> connected to the USB-C port. For the boards with JH7110 and not any
> VL805 USB controller this Cadence USB is the only way to have host USB. It is
> very much wanted to have host USB. Thanks! -E
> 

In VF2, PCIe0 connect with VL805 USB 3.0 host controller. Now PCIe driver have
commit to Uboot upstream code. USB 3.0 can be used in uboot upstream code.
Milk-v mars also connect VL805 and can use USB 3.0 host too.

You can use "pci e" command to active USB 3.0 host controller and then "usb reset" to 
scan usb devices.  If you have any issue about this. Also reply it in this. Thanks.

> On Sun, May 19, 2024 at 11:20 PM Minda Chen <minda.chen@starfivetech.com>
> wrote:
> >
> >
> >
> > >
> > > Hi, there is a compile warning. I don't know why.
> > >
> > > On Sat, May 4, 2024 at 8:04 AM Minda Chen
> > > <minda.chen@starfivetech.com>
> > > wrote:
> > > >
> > > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > > So the codes can be used in visionfive2 and milkv 7110 board.
> > > >
> > > > The driver is almost the same with kernel driver.
> > > >
> > > > patch1: Add set phy mode function in cdns3 core driver
> > > >         which is used by Starfive.
> > > >
> > > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > > patch4: Cadence USB wrapper driver.
> > > > patch5-7 dts, config and maintainers update.
> > > >
> > > > Minda Chen (7):
> > > >   usb: cdns3: Set USB PHY mode in cdns3_probe()
> > > >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > > >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > > >   usb: cdns: starfive: Add cdns USB driver
> > > >   configs: starfive: Add visionfive2 cadence USB configuration
> > > >   dts: starfive: Add JH7110 Cadence USB dts node
> > > >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> > > >
> > > >  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> > > >  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> > > >  board/starfive/visionfive2/MAINTAINERS        |   2 +
> > > >  configs/starfive_visionfive2_defconfig        |   9 +
> > > >  drivers/phy/Kconfig                           |   1 +
> > > >  drivers/phy/Makefile                          |   1 +
> > > >  drivers/phy/starfive/Kconfig                  |  19 ++
> > > >  drivers/phy/starfive/Makefile                 |   7 +
> > > >  drivers/phy/starfive/phy-jh7110-pcie.c        | 211
> > > ++++++++++++++++++
> > > >  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
> > > >  drivers/usb/cdns3/Kconfig                     |   7 +
> > > >  drivers/usb/cdns3/Makefile                    |   2 +
> > > >  drivers/usb/cdns3/cdns3-starfive.c            | 184
> +++++++++++++++
> > > >  drivers/usb/cdns3/core.c                      |  17 ++
> > > >  14 files changed, 652 insertions(+)  create mode 100644
> > > > drivers/phy/starfive/Kconfig  create mode 100644
> > > > drivers/phy/starfive/Makefile  create mode 100644
> > > > drivers/phy/starfive/phy-jh7110-pcie.c
> > > >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> > > >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> > > >
> > > >
> > > > base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> > > > --
> > > > 2.17.1
> > > >
> > >
> > > The compile warning as follows:
> > >
> > > In file included from
> > > /home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
> > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > ‘bitmap_find_next_zero_area’:
> > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > > ‘find_next_bit’? [-Wimplicit-function-declaration]
> > >   170 |         index = find_next_zero_bit(map, size, start);
> > >       |                 ^~~~~~~~~~~~~~~~~~
> > >       |                 find_next_bit
> > >   CC      drivers/usb/cdns3/ep0.o
> > > In file included from
> > > /home/user/source/u-boot.git/include/linux/usb/composite.h:26,
> > >                  from
> > > /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
> > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > ‘bitmap_find_next_zero_area’:
> > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > > ‘find_next_bit’? [-Wimplicit-function-declaration]
> > >   170 |         index = find_next_zero_bit(map, size, start);
> > >       |                 ^~~~~~~~~~~~~~~~~~
> > >       |                 find_next_bit
> > >
> > >
> > > Is this something missing in the patch series?
> > >
> > > -E
> >
> > I have not noticed this. I just check this it is risc-v code do not contain
> "find_next_zero_bit" macro define.

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[E Shattow]

Hi,

On Sun, Jun 23, 2024 at 6:28 PM Minda Chen <minda.chen@starfivetech.com> wrote:
>
>
>
> >
> > Minda, can you test USB Host function on VisionFive2? I guess that it is
> > connected to the USB-C port. For the boards with JH7110 and not any
> > VL805 USB controller this Cadence USB is the only way to have host USB. It is
> > very much wanted to have host USB. Thanks! -E
> >
>
> In VF2, PCIe0 connect with VL805 USB 3.0 host controller. Now PCIe driver have
> commit to Uboot upstream code. USB 3.0 can be used in uboot upstream code.
> Milk-v mars also connect VL805 and can use USB 3.0 host too.

No no I am asking about Cadence USB of JH7110 CPU. This VL805 is not
the question, sorry that my question was not easy to understand
before.

>
> You can use "pci e" command to active USB 3.0 host controller and then "usb reset" to
> scan usb devices.  If you have any issue about this. Also reply it in this. Thanks.

Can you show that Host USB is functioning on VF2 with the JH7110 CPU
Cadence USB, not the VL805 controller?

This is needed so Milk-V Mars CM and Pine64 Star64 can have USB Host.
There is no use of VL805 and we need JH7110 Cadence USB then.

Thanks!

-E

>
> > On Sun, May 19, 2024 at 11:20 PM Minda Chen <minda.chen@starfivetech.com>
> > wrote:
> > >
> > >
> > >
> > > >
> > > > Hi, there is a compile warning. I don't know why.
> > > >
> > > > On Sat, May 4, 2024 at 8:04 AM Minda Chen
> > > > <minda.chen@starfivetech.com>
> > > > wrote:
> > > > >
> > > > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > > > So the codes can be used in visionfive2 and milkv 7110 board.
> > > > >
> > > > > The driver is almost the same with kernel driver.
> > > > >
> > > > > patch1: Add set phy mode function in cdns3 core driver
> > > > >         which is used by Starfive.
> > > > >
> > > > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > > > patch4: Cadence USB wrapper driver.
> > > > > patch5-7 dts, config and maintainers update.
> > > > >
> > > > > Minda Chen (7):
> > > > >   usb: cdns3: Set USB PHY mode in cdns3_probe()
> > > > >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > > > >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > > > >   usb: cdns: starfive: Add cdns USB driver
> > > > >   configs: starfive: Add visionfive2 cadence USB configuration
> > > > >   dts: starfive: Add JH7110 Cadence USB dts node
> > > > >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> > > > >
> > > > >  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> > > > >  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> > > > >  board/starfive/visionfive2/MAINTAINERS        |   2 +
> > > > >  configs/starfive_visionfive2_defconfig        |   9 +
> > > > >  drivers/phy/Kconfig                           |   1 +
> > > > >  drivers/phy/Makefile                          |   1 +
> > > > >  drivers/phy/starfive/Kconfig                  |  19 ++
> > > > >  drivers/phy/starfive/Makefile                 |   7 +
> > > > >  drivers/phy/starfive/phy-jh7110-pcie.c        | 211
> > > > ++++++++++++++++++
> > > > >  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
> > > > >  drivers/usb/cdns3/Kconfig                     |   7 +
> > > > >  drivers/usb/cdns3/Makefile                    |   2 +
> > > > >  drivers/usb/cdns3/cdns3-starfive.c            | 184
> > +++++++++++++++
> > > > >  drivers/usb/cdns3/core.c                      |  17 ++
> > > > >  14 files changed, 652 insertions(+)  create mode 100644
> > > > > drivers/phy/starfive/Kconfig  create mode 100644
> > > > > drivers/phy/starfive/Makefile  create mode 100644
> > > > > drivers/phy/starfive/phy-jh7110-pcie.c
> > > > >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> > > > >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> > > > >
> > > > >
> > > > > base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> > > > > --
> > > > > 2.17.1
> > > > >
> > > >
> > > > The compile warning as follows:
> > > >
> > > > In file included from
> > > > /home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
> > > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > > ‘bitmap_find_next_zero_area’:
> > > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > > > ‘find_next_bit’? [-Wimplicit-function-declaration]
> > > >   170 |         index = find_next_zero_bit(map, size, start);
> > > >       |                 ^~~~~~~~~~~~~~~~~~
> > > >       |                 find_next_bit
> > > >   CC      drivers/usb/cdns3/ep0.o
> > > > In file included from
> > > > /home/user/source/u-boot.git/include/linux/usb/composite.h:26,
> > > >                  from
> > > > /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
> > > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > > ‘bitmap_find_next_zero_area’:
> > > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > > implicit declaration of function ‘find_next_zero_bit’; did you mean
> > > > ‘find_next_bit’? [-Wimplicit-function-declaration]
> > > >   170 |         index = find_next_zero_bit(map, size, start);
> > > >       |                 ^~~~~~~~~~~~~~~~~~
> > > >       |                 find_next_bit
> > > >
> > > >
> > > > Is this something missing in the patch series?
> > > >
> > > > -E
> > >
> > > I have not noticed this. I just check this it is risc-v code do not contain
> > "find_next_zero_bit" macro define.

Re: [PATCH v1 0/7] Add Starfive JH7110 Cadence USB driver

[Minda Chen]

> 
> Hi,
> 
> On Sun, Jun 23, 2024 at 6:28 PM Minda Chen <minda.chen@starfivetech.com>
> wrote:
> >
> >
> >
> > >
> > > Minda, can you test USB Host function on VisionFive2? I guess that
> > > it is connected to the USB-C port. For the boards with JH7110 and
> > > not any
> > > VL805 USB controller this Cadence USB is the only way to have host
> > > USB. It is very much wanted to have host USB. Thanks! -E
> > >
> >
> > In VF2, PCIe0 connect with VL805 USB 3.0 host controller. Now PCIe
> > driver have commit to Uboot upstream code. USB 3.0 can be used in uboot
> upstream code.
> > Milk-v mars also connect VL805 and can use USB 3.0 host too.
> 
> No no I am asking about Cadence USB of JH7110 CPU. This VL805 is not the
> question, sorry that my question was not easy to understand before.
> 
> >
> > You can use "pci e" command to active USB 3.0 host controller and then
> > "usb reset" to scan usb devices.  If you have any issue about this. Also reply it
> in this. Thanks.
> 
> Can you show that Host USB is functioning on VF2 with the JH7110 CPU Cadence
> USB, not the VL805 controller?
> 
VF2 cadence USB is dr mode device.I cant test is with host.

> This is needed so Milk-V Mars CM and Pine64 Star64 can have USB Host.
> There is no use of VL805 and we need JH7110 Cadence USB then.
> 
> Thanks!
> 
> -E
> 
Okay. I will test cadence USB host in star64 board.

> >
> > > On Sun, May 19, 2024 at 11:20 PM Minda Chen
> > > <minda.chen@starfivetech.com>
> > > wrote:
> > > >
> > > >
> > > >
> > > > >
> > > > > Hi, there is a compile warning. I don't know why.
> > > > >
> > > > > On Sat, May 4, 2024 at 8:04 AM Minda Chen
> > > > > <minda.chen@starfivetech.com>
> > > > > wrote:
> > > > > >
> > > > > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > > > > So the codes can be used in visionfive2 and milkv 7110 board.
> > > > > >
> > > > > > The driver is almost the same with kernel driver.
> > > > > >
> > > > > > patch1: Add set phy mode function in cdns3 core driver
> > > > > >         which is used by Starfive.
> > > > > >
> > > > > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > > > > patch4: Cadence USB wrapper driver.
> > > > > > patch5-7 dts, config and maintainers update.
> > > > > >
> > > > > > Minda Chen (7):
> > > > > >   usb: cdns3: Set USB PHY mode in cdns3_probe()
> > > > > >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > > > > >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > > > > >   usb: cdns: starfive: Add cdns USB driver
> > > > > >   configs: starfive: Add visionfive2 cadence USB configuration
> > > > > >   dts: starfive: Add JH7110 Cadence USB dts node
> > > > > >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> > > > > >
> > > > > >  .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> > > > > >  arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> > > > > >  board/starfive/visionfive2/MAINTAINERS        |   2 +
> > > > > >  configs/starfive_visionfive2_defconfig        |   9 +
> > > > > >  drivers/phy/Kconfig                           |   1 +
> > > > > >  drivers/phy/Makefile                          |   1 +
> > > > > >  drivers/phy/starfive/Kconfig                  |  19 ++
> > > > > >  drivers/phy/starfive/Makefile                 |   7 +
> > > > > >  drivers/phy/starfive/phy-jh7110-pcie.c        | 211
> > > > > ++++++++++++++++++
> > > > > >  drivers/phy/starfive/phy-jh7110-usb2.c        | 135 +++++++++++
> > > > > >  drivers/usb/cdns3/Kconfig                     |   7 +
> > > > > >  drivers/usb/cdns3/Makefile                    |   2 +
> > > > > >  drivers/usb/cdns3/cdns3-starfive.c            | 184
> > > +++++++++++++++
> > > > > >  drivers/usb/cdns3/core.c                      |  17 ++
> > > > > >  14 files changed, 652 insertions(+)  create mode 100644
> > > > > > drivers/phy/starfive/Kconfig  create mode 100644
> > > > > > drivers/phy/starfive/Makefile  create mode 100644
> > > > > > drivers/phy/starfive/phy-jh7110-pcie.c
> > > > > >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> > > > > >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> > > > > >
> > > > > >
> > > > > > base-commit: 174ac987655c888017c82df1883c0c2ea0dc2495
> > > > > > --
> > > > > > 2.17.1
> > > > > >
> > > > >
> > > > > The compile warning as follows:
> > > > >
> > > > > In file included from
> > > > > /home/user/source/u-boot.git/drivers/usb/cdns3/gadget.c:70:
> > > > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > > > ‘bitmap_find_next_zero_area’:
> > > > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > > > implicit declaration of function ‘find_next_zero_bit’; did you
> > > > > mean ‘find_next_bit’? [-Wimplicit-function-declaration]
> > > > >   170 |         index = find_next_zero_bit(map, size, start);
> > > > >       |                 ^~~~~~~~~~~~~~~~~~
> > > > >       |                 find_next_bit
> > > > >   CC      drivers/usb/cdns3/ep0.o
> > > > > In file included from
> > > > > /home/user/source/u-boot.git/include/linux/usb/composite.h:26,
> > > > >                  from
> > > > > /home/user/source/u-boot.git/drivers/usb/cdns3/ep0.c:19:
> > > > > /home/user/source/u-boot.git/include/linux/bitmap.h: In function
> > > > > ‘bitmap_find_next_zero_area’:
> > > > > /home/user/source/u-boot.git/include/linux/bitmap.h:170:17: warning:
> > > > > implicit declaration of function ‘find_next_zero_bit’; did you
> > > > > mean ‘find_next_bit’? [-Wimplicit-function-declaration]
> > > > >   170 |         index = find_next_zero_bit(map, size, start);
> > > > >       |                 ^~~~~~~~~~~~~~~~~~
> > > > >       |                 find_next_bit
> > > > >
> > > > >
> > > > > Is this something missing in the patch series?
> > > > >
> > > > > -E
> > > >
> > > > I have not noticed this. I just check this it is risc-v code do
> > > > not contain
> > > "find_next_zero_bit" macro define.