From: Christian Marangi <ansuelsmth@gmail.com>
To: Lukasz Majewski <lukma@denx.de>,
Sean Anderson <seanga2@gmail.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
Tom Rini <trini@konsulko.com>,
Christian Marangi <ansuelsmth@gmail.com>,
u-boot@lists.denx.de
Subject: [PATCH 2/8] clk: mediatek_ mt7622: rename AUDIO_AWB3 to AUDIO_AWB2
Date: Fri, 2 Aug 2024 15:48:26 +0200 [thread overview]
Message-ID: <20240802134835.24006-3-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20240802134835.24006-1-ansuelsmth@gmail.com>
Rename AUDIO_AWB3 to AUDIO_AWB2 to match upstream linux naming in
preparation for OF_UPSTREAM support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
include/dt-bindings/clock/mt7622-clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h
index 76fcaff0e42..78804f40307 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -206,7 +206,7 @@
#define CLK_AUDIO_DLMCH 31
#define CLK_AUDIO_ARB1 32
#define CLK_AUDIO_AWB 33
-#define CLK_AUDIO_AWB3 34
+#define CLK_AUDIO_AWB2 34
#define CLK_AUDIO_DAI 35
#define CLK_AUDIO_MOD 36
#define CLK_AUDIO_ASRCI3 37
--
2.45.2
next prev parent reply other threads:[~2024-08-02 19:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-02 13:48 [PATCH 0/8] clk: mediatek: mt7622: clk migration for OF_UPSTREAM Christian Marangi
2024-08-02 13:48 ` [PATCH 1/8] clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents Christian Marangi
2024-08-02 13:48 ` Christian Marangi [this message]
2024-08-02 13:48 ` [PATCH 3/8] clk: mediatek: mt7622: move INFRA_TRNG to the bottom Christian Marangi
2024-08-02 13:48 ` [PATCH 4/8] clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN Christian Marangi
2024-08-02 13:48 ` [PATCH 5/8] clk: mediatek: mt7622: add missing clock MUX1_SEL Christian Marangi
2024-08-02 13:48 ` [PATCH 6/8] clk: mediatek: mt7622: add missing clock PERI_UART4_PD Christian Marangi
2024-08-02 13:48 ` [PATCH 7/8] clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock Christian Marangi
2024-08-02 13:48 ` [PATCH 8/8] clk: mediatek: mt7622: add missing A1/2SYS clock ID Christian Marangi
2024-08-10 12:46 ` Aw: " Frank Wunderlich
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