public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Christian Marangi <ansuelsmth@gmail.com>
To: Tom Rini <trini@konsulko.com>, Lukasz Majewski <lukma@denx.de>,
	Sean Anderson <seanga2@gmail.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Weijie Gao <weijie.gao@mediatek.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
	Christian Marangi <ansuelsmth@gmail.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	Dong Huang <dong.huang@mediatek.com>,
	u-boot@lists.denx.de
Subject: [PATCH 08/13] clk: mediatek: mt7988: reorder TOPCKGEN factor ID
Date: Sat,  3 Aug 2024 10:32:57 +0200	[thread overview]
Message-ID: <20240803083305.30697-9-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20240803083305.30697-1-ansuelsmth@gmail.com>

Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is
to match how it's done in upstream kernel linux and in preparation for
OF_UPSTREAM support.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 drivers/clk/mediatek/clk-mt7988.c      |  80 +++++++--------
 include/dt-bindings/clock/mt7988-clk.h | 130 ++++++++++++-------------
 2 files changed, 105 insertions(+), 105 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c
index 6bbc7045169..24dc3299e11 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -52,46 +52,6 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
 /* TOPCKGEN FIXED DIV */
 static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
 	XTAL_FACTOR(CK_TOP_XTAL, "xtal", CLK_XTAL, 1, 1),
-	PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
-	PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
-	PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
-	PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
-	PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
-	PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
-	PLL_FACTOR(CK_TOP_CB_MMPLL_720M, "cb_mmpll_720m", CK_APMIXED_MMPLL, 1, 1),
-	PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
-	PLL_FACTOR(CK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", CK_APMIXED_MMPLL, 1, 15),
-	PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APMIXED_MMPLL, 1, 4),
-	PLL_FACTOR(CK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", CK_APMIXED_MMPLL, 1, 12),
-	PLL_FACTOR(CK_TOP_MMPLL_D8, "mmpll_d8", CK_APMIXED_MMPLL, 1, 8),
-	PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
-		   1),
-	PLL_FACTOR(CK_TOP_APLL2_D4, "apll2_d4", CK_APMIXED_APLL2, 1, 4),
-	PLL_FACTOR(CK_TOP_NET1PLL_D4, "net1pll_d4", CK_APMIXED_NET1PLL, 1, 4),
-	PLL_FACTOR(CK_TOP_NET1PLL_D5, "net1pll_d5", CK_APMIXED_NET1PLL, 1, 5),
-	PLL_FACTOR(CK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", CK_APMIXED_NET1PLL, 1, 10),
-	PLL_FACTOR(CK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", CK_APMIXED_NET1PLL, 1, 20),
-	PLL_FACTOR(CK_TOP_NET1PLL_D8, "net1pll_d8", CK_APMIXED_NET1PLL, 1, 8),
-	PLL_FACTOR(CK_TOP_NET1PLL_D8_D2, "net1pll_d8_d2", CK_APMIXED_NET1PLL, 1, 16),
-	PLL_FACTOR(CK_TOP_NET1PLL_D8_D4, "net1pll_d8_d4", CK_APMIXED_NET1PLL, 1, 32),
-	PLL_FACTOR(CK_TOP_NET1PLL_D8_D8, "net1pll_d8_d8", CK_APMIXED_NET1PLL, 1, 64),
-	PLL_FACTOR(CK_TOP_NET1PLL_D8_D16, "net1pll_d8_d16", CK_APMIXED_NET1PLL, 1,
-		   128),
-	PLL_FACTOR(CK_TOP_NET2PLL_800M, "cb_net2pll_800m", CK_APMIXED_NET2PLL, 1,
-		   1),
-	PLL_FACTOR(CK_TOP_NET2PLL_D2, "net2pll_d2", CK_APMIXED_NET2PLL, 1, 2),
-	PLL_FACTOR(CK_TOP_NET2PLL_D4, "net2pll_d4", CK_APMIXED_NET2PLL, 1, 4),
-	PLL_FACTOR(CK_TOP_NET2PLL_D4_D4, "net2pll_d4_d4", CK_APMIXED_NET2PLL, 1, 16),
-	PLL_FACTOR(CK_TOP_NET2PLL_D4_D8, "net2pll_d4_d8", CK_APMIXED_NET2PLL, 1, 32),
-	PLL_FACTOR(CK_TOP_NET2PLL_D6, "net2pll_d6", CK_APMIXED_NET2PLL, 1, 6),
-	PLL_FACTOR(CK_TOP_NET2PLL_D8, "net2pll_d8", CK_APMIXED_NET2PLL, 1, 8),
-	PLL_FACTOR(CK_TOP_CB_WEDMCUPLL_208M, "cb_wedmcupll_208m",
-		   CK_APMIXED_WEDMCUPLL, 1, 1),
-	PLL_FACTOR(CK_TOP_CB_SGM_325M, "cb_sgm_325m", CK_APMIXED_SGMPLL, 1, 1),
-	PLL_FACTOR(CK_TOP_CB_NETSYSPLL_850M, "cb_netsyspll_850m",
-		   CK_APMIXED_NETSYSPLL, 1, 1),
-	PLL_FACTOR(CK_TOP_CB_MSDCPLL_400M, "cb_msdcpll_400m", CK_APMIXED_MSDCPLL, 1,
-		   1),
 	TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL, 1, 2),
 	TOP_FACTOR(CK_TOP_RTC_32K, "rtc_32k", CK_TOP_XTAL, 1,
 		   1250),
@@ -132,6 +92,46 @@ static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
 		   1, 1),
 	TOP_FACTOR(CK_TOP_USB_REF, "usb_ref", CK_TOP_CKSQ_SRC, 1, 1),
 	TOP_FACTOR(CK_TOP_USB_CK_P1, "usb_ck_p1", CK_TOP_CKSQ_SRC, 1, 1),
+	PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
+	PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
+	PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
+	PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
+	PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
+	PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
+	PLL_FACTOR(CK_TOP_CB_MMPLL_720M, "cb_mmpll_720m", CK_APMIXED_MMPLL, 1, 1),
+	PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
+	PLL_FACTOR(CK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", CK_APMIXED_MMPLL, 1, 15),
+	PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APMIXED_MMPLL, 1, 4),
+	PLL_FACTOR(CK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", CK_APMIXED_MMPLL, 1, 12),
+	PLL_FACTOR(CK_TOP_MMPLL_D8, "mmpll_d8", CK_APMIXED_MMPLL, 1, 8),
+	PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
+		   1),
+	PLL_FACTOR(CK_TOP_APLL2_D4, "apll2_d4", CK_APMIXED_APLL2, 1, 4),
+	PLL_FACTOR(CK_TOP_NET1PLL_D4, "net1pll_d4", CK_APMIXED_NET1PLL, 1, 4),
+	PLL_FACTOR(CK_TOP_NET1PLL_D5, "net1pll_d5", CK_APMIXED_NET1PLL, 1, 5),
+	PLL_FACTOR(CK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", CK_APMIXED_NET1PLL, 1, 10),
+	PLL_FACTOR(CK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", CK_APMIXED_NET1PLL, 1, 20),
+	PLL_FACTOR(CK_TOP_NET1PLL_D8, "net1pll_d8", CK_APMIXED_NET1PLL, 1, 8),
+	PLL_FACTOR(CK_TOP_NET1PLL_D8_D2, "net1pll_d8_d2", CK_APMIXED_NET1PLL, 1, 16),
+	PLL_FACTOR(CK_TOP_NET1PLL_D8_D4, "net1pll_d8_d4", CK_APMIXED_NET1PLL, 1, 32),
+	PLL_FACTOR(CK_TOP_NET1PLL_D8_D8, "net1pll_d8_d8", CK_APMIXED_NET1PLL, 1, 64),
+	PLL_FACTOR(CK_TOP_NET1PLL_D8_D16, "net1pll_d8_d16", CK_APMIXED_NET1PLL, 1,
+		   128),
+	PLL_FACTOR(CK_TOP_NET2PLL_800M, "cb_net2pll_800m", CK_APMIXED_NET2PLL, 1,
+		   1),
+	PLL_FACTOR(CK_TOP_NET2PLL_D2, "net2pll_d2", CK_APMIXED_NET2PLL, 1, 2),
+	PLL_FACTOR(CK_TOP_NET2PLL_D4, "net2pll_d4", CK_APMIXED_NET2PLL, 1, 4),
+	PLL_FACTOR(CK_TOP_NET2PLL_D4_D4, "net2pll_d4_d4", CK_APMIXED_NET2PLL, 1, 16),
+	PLL_FACTOR(CK_TOP_NET2PLL_D4_D8, "net2pll_d4_d8", CK_APMIXED_NET2PLL, 1, 32),
+	PLL_FACTOR(CK_TOP_NET2PLL_D6, "net2pll_d6", CK_APMIXED_NET2PLL, 1, 6),
+	PLL_FACTOR(CK_TOP_NET2PLL_D8, "net2pll_d8", CK_APMIXED_NET2PLL, 1, 8),
+	PLL_FACTOR(CK_TOP_CB_WEDMCUPLL_208M, "cb_wedmcupll_208m",
+		   CK_APMIXED_WEDMCUPLL, 1, 1),
+	PLL_FACTOR(CK_TOP_CB_SGM_325M, "cb_sgm_325m", CK_APMIXED_SGMPLL, 1, 1),
+	PLL_FACTOR(CK_TOP_CB_NETSYSPLL_850M, "cb_netsyspll_850m",
+		   CK_APMIXED_NETSYSPLL, 1, 1),
+	PLL_FACTOR(CK_TOP_CB_MSDCPLL_400M, "cb_msdcpll_400m", CK_APMIXED_MSDCPLL, 1,
+		   1),
 };
 
 /* TOPCKGEN MUX PARENTS */
diff --git a/include/dt-bindings/clock/mt7988-clk.h b/include/dt-bindings/clock/mt7988-clk.h
index 36a5f4818b2..47ea13c04b8 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -121,71 +121,71 @@
 
 /* TOPCKGEN */
 /* mtk_fixed_factor */
-#define CK_TOP_XTAL           0 /* Linux CLK ID (74) */
-#define CK_TOP_CB_MPLL_416M   1 /* Linux CLK ID (75) */
-#define CK_TOP_MPLL_D2	      2 /* Linux CLK ID (76) */
-#define CK_TOP_MPLL_D3_D2     3 /* Linux CLK ID (77) */
-#define CK_TOP_MPLL_D4	      4 /* Linux CLK ID (78) */
-#define CK_TOP_MPLL_D8	      5 /* Linux CLK ID (79) */
-#define CK_TOP_MPLL_D8_D2     6 /* Linux CLK ID (80) */
-#define CK_TOP_CB_MMPLL_720M  7 /* Linux CLK ID (81) */
-#define CK_TOP_MMPLL_D2	      8 /* Linux CLK ID (82) */
-#define CK_TOP_MMPLL_D3_D5    9 /* Linux CLK ID (83) */
-#define CK_TOP_MMPLL_D4	      10 /* Linux CLK ID (84) */
-#define CK_TOP_MMPLL_D6_D2    11 /* Linux CLK ID (85) */
-#define CK_TOP_MMPLL_D8	      12 /* Linux CLK ID (86) */
-#define CK_TOP_CB_APLL2_196M  13 /* Linux CLK ID (87) */
-#define CK_TOP_APLL2_D4       14 /* Linux CLK ID (88) */
-#define CK_TOP_NET1PLL_D4     15 /* Linux CLK ID (89) */
-#define CK_TOP_NET1PLL_D5     16 /* Linux CLK ID (90) */
-#define CK_TOP_NET1PLL_D5_D2  17 /* Linux CLK ID (91) */
-#define CK_TOP_NET1PLL_D5_D4  18 /* Linux CLK ID (92) */
-#define CK_TOP_NET1PLL_D8     19 /* Linux CLK ID (93) */
-#define CK_TOP_NET1PLL_D8_D2  20 /* Linux CLK ID (94) */
-#define CK_TOP_NET1PLL_D8_D4  21 /* Linux CLK ID (95) */
-#define CK_TOP_NET1PLL_D8_D8  22 /* Linux CLK ID (96) */
-#define CK_TOP_NET1PLL_D8_D16 23 /* Linux CLK ID (97) */
-#define CK_TOP_CB_NET2PLL_800M 24 /* Linux CLK ID (98) */
-#define CK_TOP_NET2PLL_D2     25 /* Linux CLK ID (99) */
-#define CK_TOP_NET2PLL_D4     26 /* Linux CLK ID (100) */
-#define CK_TOP_NET2PLL_D4_D4  27 /* Linux CLK ID (101) */
-#define CK_TOP_NET2PLL_D4_D8  28 /* Linux CLK ID (102) */
-#define CK_TOP_NET2PLL_D6     29 /* Linux CLK ID (103) */
-#define CK_TOP_NET2PLL_D8     30 /* Linux CLK ID (104) */
-#define CK_TOP_CB_WEDMCUPLL_208M 31 /* Linux CLK ID (105) */
-#define CK_TOP_CB_SGMPLL_325M 32 /* Linux CLK ID (106) */
-#define CK_TOP_CB_NETSYSPLL_850M 33 /* Linux CLK ID (107) */
-#define CK_TOP_CB_MSDCPLL_400M 34 /* Linux CLK ID (108) */
-#define CK_TOP_XTAL_D2        35 /* Linux CLK ID (109) */
-#define CK_TOP_RTC_32K        36 /* Linux CLK ID (110) */
-#define CK_TOP_RTC_32P7K      37 /* Linux CLK ID (111) */
-#define CK_TOP_INFRA_F32K     38 /* Linux CLK ID (112) */
-#define CK_TOP_CKSQ_SRC	      39 /* Linux CLK ID (113) */
-#define CK_TOP_NETSYS_2X      40 /* Linux CLK ID (114) */
-#define CK_TOP_NETSYS_GSW     41 /* Linux CLK ID (115) */
-#define CK_TOP_NETSYS_WED_MCU 42 /* Linux CLK ID (116) */
-#define CK_TOP_EIP197	      43 /* Linux CLK ID (117) */
-#define CK_TOP_EMMC_250M      44 /* Linux CLK ID (118) */
-#define CK_TOP_EMMC_400M      45 /* Linux CLK ID (119) */
-#define CK_TOP_SPI	      46 /* Linux CLK ID (120) */
-#define CK_TOP_SPIM_MST	      47 /* Linux CLK ID (121) */
-#define CK_TOP_NFI1X	      48 /* Linux CLK ID (122) */
-#define CK_TOP_SPINFI_BCK     49 /* Linux CLK ID (123) */
-#define CK_TOP_I2C_BCK	      50 /* Linux CLK ID (124) */
-#define CK_TOP_USB_SYS	      51 /* Linux CLK ID (125) */
-#define CK_TOP_USB_SYS_P1     52 /* Linux CLK ID (126) */
-#define CK_TOP_USB_XHCI	      53 /* Linux CLK ID (127) */
-#define CK_TOP_USB_XHCI_P1    54 /* Linux CLK ID (128) */
-#define CK_TOP_USB_FRMCNT     55 /* Linux CLK ID (129) */
-#define CK_TOP_USB_FRMCNT_P1  56 /* Linux CLK ID (130) */
-#define CK_TOP_AUD	      57 /* Linux CLK ID (131) */
-#define CK_TOP_A1SYS	      58 /* Linux CLK ID (132) */
-#define CK_TOP_AUD_L	      59 /* Linux CLK ID (133) */
-#define CK_TOP_A_TUNER	      60 /* Linux CLK ID (134) */
-#define CK_TOP_SYSAXI	      61 /* Linux CLK ID (135) */
-#define CK_TOP_INFRA_F26M     62 /* Linux CLK ID (136) */
-#define CK_TOP_USB_REF	      63 /* Linux CLK ID (137) */
-#define CK_TOP_USB_CK_P1      64 /* Linux CLK ID (138) */
+#define CK_TOP_XTAL_D2        0 /* Linux CLK ID (109) */
+#define CK_TOP_RTC_32K        1 /* Linux CLK ID (110) */
+#define CK_TOP_RTC_32P7K      2 /* Linux CLK ID (111) */
+#define CK_TOP_INFRA_F32K     3 /* Linux CLK ID (112) */
+#define CK_TOP_CKSQ_SRC	      4 /* Linux CLK ID (113) */
+#define CK_TOP_NETSYS_2X      5 /* Linux CLK ID (114) */
+#define CK_TOP_NETSYS_GSW     6 /* Linux CLK ID (115) */
+#define CK_TOP_NETSYS_WED_MCU 7 /* Linux CLK ID (116) */
+#define CK_TOP_EIP197	      8 /* Linux CLK ID (117) */
+#define CK_TOP_EMMC_250M      9 /* Linux CLK ID (118) */
+#define CK_TOP_EMMC_400M      10 /* Linux CLK ID (119) */
+#define CK_TOP_SPI	      11 /* Linux CLK ID (120) */
+#define CK_TOP_SPIM_MST	      12 /* Linux CLK ID (121) */
+#define CK_TOP_NFI1X	      13 /* Linux CLK ID (122) */
+#define CK_TOP_SPINFI_BCK     14 /* Linux CLK ID (123) */
+#define CK_TOP_I2C_BCK	      15 /* Linux CLK ID (124) */
+#define CK_TOP_USB_SYS	      16 /* Linux CLK ID (125) */
+#define CK_TOP_USB_SYS_P1     17 /* Linux CLK ID (126) */
+#define CK_TOP_USB_XHCI	      18 /* Linux CLK ID (127) */
+#define CK_TOP_USB_XHCI_P1    19 /* Linux CLK ID (128) */
+#define CK_TOP_USB_FRMCNT     20 /* Linux CLK ID (129) */
+#define CK_TOP_USB_FRMCNT_P1  21 /* Linux CLK ID (130) */
+#define CK_TOP_AUD	      22 /* Linux CLK ID (131) */
+#define CK_TOP_A1SYS	      23 /* Linux CLK ID (132) */
+#define CK_TOP_AUD_L	      24 /* Linux CLK ID (133) */
+#define CK_TOP_A_TUNER	      25 /* Linux CLK ID (134) */
+#define CK_TOP_SYSAXI	      26 /* Linux CLK ID (135) */
+#define CK_TOP_INFRA_F26M     27 /* Linux CLK ID (136) */
+#define CK_TOP_USB_REF	      28 /* Linux CLK ID (137) */
+#define CK_TOP_USB_CK_P1      29 /* Linux CLK ID (138) */
+#define CK_TOP_XTAL           30 /* Linux CLK ID (74) */
+#define CK_TOP_CB_MPLL_416M   31 /* Linux CLK ID (75) */
+#define CK_TOP_MPLL_D2	      32 /* Linux CLK ID (76) */
+#define CK_TOP_MPLL_D3_D2     33 /* Linux CLK ID (77) */
+#define CK_TOP_MPLL_D4	      35 /* Linux CLK ID (78) */
+#define CK_TOP_MPLL_D8	      34 /* Linux CLK ID (79) */
+#define CK_TOP_MPLL_D8_D2     36 /* Linux CLK ID (80) */
+#define CK_TOP_CB_MMPLL_720M  37 /* Linux CLK ID (81) */
+#define CK_TOP_MMPLL_D2	      38 /* Linux CLK ID (82) */
+#define CK_TOP_MMPLL_D3_D5    39 /* Linux CLK ID (83) */
+#define CK_TOP_MMPLL_D4	      40 /* Linux CLK ID (84) */
+#define CK_TOP_MMPLL_D6_D2    41 /* Linux CLK ID (85) */
+#define CK_TOP_MMPLL_D8	      42 /* Linux CLK ID (86) */
+#define CK_TOP_CB_APLL2_196M  43 /* Linux CLK ID (87) */
+#define CK_TOP_APLL2_D4       44 /* Linux CLK ID (88) */
+#define CK_TOP_NET1PLL_D4     45 /* Linux CLK ID (89) */
+#define CK_TOP_NET1PLL_D5     46 /* Linux CLK ID (90) */
+#define CK_TOP_NET1PLL_D5_D2  47 /* Linux CLK ID (91) */
+#define CK_TOP_NET1PLL_D5_D4  48 /* Linux CLK ID (92) */
+#define CK_TOP_NET1PLL_D8     49 /* Linux CLK ID (93) */
+#define CK_TOP_NET1PLL_D8_D2  50 /* Linux CLK ID (94) */
+#define CK_TOP_NET1PLL_D8_D4  51 /* Linux CLK ID (95) */
+#define CK_TOP_NET1PLL_D8_D8  52 /* Linux CLK ID (96) */
+#define CK_TOP_NET1PLL_D8_D16 53 /* Linux CLK ID (97) */
+#define CK_TOP_CB_NET2PLL_800M 54 /* Linux CLK ID (98) */
+#define CK_TOP_NET2PLL_D2     55 /* Linux CLK ID (99) */
+#define CK_TOP_NET2PLL_D4     56 /* Linux CLK ID (100) */
+#define CK_TOP_NET2PLL_D4_D4  57 /* Linux CLK ID (101) */
+#define CK_TOP_NET2PLL_D4_D8  58 /* Linux CLK ID (102) */
+#define CK_TOP_NET2PLL_D6     59 /* Linux CLK ID (103) */
+#define CK_TOP_NET2PLL_D8     60 /* Linux CLK ID (104) */
+#define CK_TOP_CB_WEDMCUPLL_208M 61 /* Linux CLK ID (105) */
+#define CK_TOP_CB_SGMPLL_325M 62 /* Linux CLK ID (106) */
+#define CK_TOP_CB_NETSYSPLL_850M 63 /* Linux CLK ID (107) */
+#define CK_TOP_CB_MSDCPLL_400M 64 /* Linux CLK ID (108) */
 /* mtk_mux */
 #define CK_TOP_NETSYS_SEL	      65 /* Linux CLK ID (0) */
 #define CK_TOP_NETSYS_500M_SEL	      66 /* Linux CLK ID (1) */
-- 
2.45.2


  parent reply	other threads:[~2024-08-03  8:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-03  8:32 [PATCH 00/13] clk: mediatek: mt7988: clk migration for OF_UPSTREAM Christian Marangi
2024-08-03  8:32 ` [PATCH 01/13] clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL Christian Marangi
2024-08-03  8:32 ` [PATCH 02/13] clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL Christian Marangi
2024-08-03  8:32 ` [PATCH 03/13] clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL Christian Marangi
2024-08-03  8:32 ` [PATCH 04/13] clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top Christian Marangi
2024-08-03  8:32 ` [PATCH 05/13] clk: mediatek: mt7988: fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 Christian Marangi
2024-08-03  8:32 ` [PATCH 06/13] clk: mediatek: mt7988: drop 1/1 infracfg spurious factor Christian Marangi
2024-08-03  8:32 ` [PATCH 07/13] clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming Christian Marangi
2024-08-03  8:32 ` Christian Marangi [this message]
2024-08-03  8:32 ` [PATCH 09/13] clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen Christian Marangi
2024-08-03  8:32 ` [PATCH 10/13] clk: mediatek: mt7988: comment out infracfg clk not defined Christian Marangi
2024-08-03  8:33 ` [PATCH 11/13] clk: mediatek: mt7988: replace clock ID with upstream linux Christian Marangi
2024-08-03  8:33 ` [PATCH 12/13] clk: mediatek: mt7988: convert to unified infracfg gates + muxes Christian Marangi
2024-08-03  8:33 ` [PATCH 13/13] clk: mediatek: mt7988: rename CK to CLK Christian Marangi
2024-08-10 18:46   ` Aw: " Frank Wunderlich
2024-08-20  0:29 ` [PATCH 00/13] clk: mediatek: mt7988: clk migration for OF_UPSTREAM Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240803083305.30697-9-ansuelsmth@gmail.com \
    --to=ansuelsmth@gmail.com \
    --cc=GSS_MTK_Uboot_upstream@mediatek.com \
    --cc=chunfeng.yun@mediatek.com \
    --cc=dong.huang@mediatek.com \
    --cc=frank-w@public-files.de \
    --cc=lukma@denx.de \
    --cc=ryder.lee@mediatek.com \
    --cc=seanga2@gmail.com \
    --cc=trini@konsulko.com \
    --cc=u-boot@lists.denx.de \
    --cc=weijie.gao@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox