[PATCH 06/15] clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate

[Christian Marangi <ansuelsmth@gmail.com>]

Add missing entry for IPCIE_PIPE_CK infra gate clock. Renumber the clock
order to match the expected offset in the gate array.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 drivers/clk/mediatek/clk-mt7986.c      | 3 ++-
 include/dt-bindings/clock/mt7986-clk.h | 7 ++++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt7986.c b/drivers/clk/mediatek/clk-mt7986.c
index f1870ce3d60..5f07de23756 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -336,7 +336,7 @@ static const struct mtk_parent infra_pwm_bsel_parents[] = {
 static const struct mtk_parent infra_pcie_parents[] = {
 	TOP_PARENT(CK_TOP_CB_RTC_32P7K),
 	TOP_PARENT(CK_TOP_F26M_SEL),
-	VOID_PARENT,
+	TOP_PARENT(CK_TOP_XTAL),
 	TOP_PARENT(CK_TOP_PEXTP_TL_SEL)
 };
 
@@ -487,6 +487,7 @@ static const struct mtk_gate infracfg_ao_gates[] = {
 			2),
 	GATE_INFRA2_TOP(CK_INFRA_IUSB_CK, "infra_iusb", CK_TOP_U2U3_SEL, 3),
 	GATE_INFRA2_TOP(CK_INFRA_IPCIE_CK, "infra_ipcie", CK_TOP_PEXTP_TL_SEL, 12),
+	GATE_INFRA2_TOP(CK_INFRA_IPCIE_PIPE_CK, "infra_ipcie_pipe", CK_TOP_XTAL, 13),
 	GATE_INFRA2_TOP(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_TOP_F26M_SEL, 14),
 	GATE_INFRA2_TOP(CK_INFRA_IPCIEB_CK, "infra_ipcieb", CK_TOP_SYSAXI_SEL, 15),
 };
diff --git a/include/dt-bindings/clock/mt7986-clk.h b/include/dt-bindings/clock/mt7986-clk.h
index dbae389858a..16faca5fef8 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -167,9 +167,10 @@
 #define CK_INFRA_IUSB_SYS_CK		40
 #define CK_INFRA_IUSB_CK		41
 #define CK_INFRA_IPCIE_CK		42
-#define CK_INFRA_IPCIER_CK		43
-#define CK_INFRA_IPCIEB_CK		44
-#define CLK_INFRA_AO_NR_CLK		45
+#define CK_INFRA_IPCIE_PIPE_CK		43
+#define CK_INFRA_IPCIER_CK		44
+#define CK_INFRA_IPCIEB_CK		45
+#define CLK_INFRA_AO_NR_CLK		46
 
 /* APMIXEDSYS */
 
-- 
2.45.2