U-Boot Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Christian Marangi <ansuelsmth@gmail.com>
To: Lukasz Majewski <lukma@denx.de>,
	Sean Anderson <seanga2@gmail.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Weijie Gao <weijie.gao@mediatek.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
	Tom Rini <trini@konsulko.com>,
	Christian Marangi <ansuelsmth@gmail.com>,
	u-boot@lists.denx.de
Subject: [PATCH v2 0/8] clk: mediatek: mt7622: clk migration for OF_UPSTREAM
Date: Sat,  3 Aug 2024 10:43:18 +0200	[thread overview]
Message-ID: <20240803084329.1688-1-ansuelsmth@gmail.com> (raw)

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.

Changes v2:
- Fix typo in commit description

Christian Marangi (8):
  clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents
  clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2
  clk: mediatek: mt7622: move INFRA_TRNG to the bottom
  clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN
  clk: mediatek: mt7622: add missing clock MUX1_SEL
  clk: mediatek: mt7622: add missing clock PERI_UART4_PD
  clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock
  clk: mediatek: mt7622: add missing A1/2SYS clock ID

 drivers/clk/mediatek/clk-mt7622.c      | 104 +++++++++++++++++++++----
 include/dt-bindings/clock/mt7622-clk.h |  68 ++++++++--------
 2 files changed, 124 insertions(+), 48 deletions(-)

-- 
2.45.2


             reply	other threads:[~2024-08-03 11:13 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-03  8:43 Christian Marangi [this message]
2024-08-03  8:43 ` [PATCH v2 1/8] clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents Christian Marangi
2024-08-03  8:43 ` [PATCH v2 2/8] clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2 Christian Marangi
2024-08-03  8:43 ` [PATCH v2 3/8] clk: mediatek: mt7622: move INFRA_TRNG to the bottom Christian Marangi
2024-08-03  8:43 ` [PATCH v2 4/8] clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN Christian Marangi
2024-08-03  8:43 ` [PATCH v2 5/8] clk: mediatek: mt7622: add missing clock MUX1_SEL Christian Marangi
2024-08-03  8:43 ` [PATCH v2 6/8] clk: mediatek: mt7622: add missing clock PERI_UART4_PD Christian Marangi
2024-08-03  8:43 ` [PATCH v2 7/8] clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock Christian Marangi
2024-08-03  8:43 ` [PATCH v2 8/8] clk: mediatek: mt7622: add missing A1/2SYS clock ID Christian Marangi
2024-08-20  0:29 ` [PATCH v2 0/8] clk: mediatek: mt7622: clk migration for OF_UPSTREAM Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240803084329.1688-1-ansuelsmth@gmail.com \
    --to=ansuelsmth@gmail.com \
    --cc=GSS_MTK_Uboot_upstream@mediatek.com \
    --cc=chunfeng.yun@mediatek.com \
    --cc=lukma@denx.de \
    --cc=ryder.lee@mediatek.com \
    --cc=seanga2@gmail.com \
    --cc=trini@konsulko.com \
    --cc=u-boot@lists.denx.de \
    --cc=weijie.gao@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox