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From: Minda Chen <minda.chen@starfivetech.com>
To: Marek Vasut <marex@denx.de>, Tom Rini <trini@konsulko.com>,
	Roger Quadros <rogerq@kernel.org>, Rick Chen <rick@andestech.com>,
	Leo <ycliang@andestech.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Alexey Romanov <avromanov@salutedevices.com>,
	Sumit Garg <sumit.garg@linaro.org>,
	Mark Kettenis <kettenis@openbsd.org>, Nishanth Menon <nm@ti.com>
Cc: u-boot@lists.denx.de, Heinrich Schuchardt <xypron.glpk@gmx.de>,
	Simon Glass <sjg@chromium.org>, E Shattow <lucent@gmail.com>,
	Minda Chen <minda.chen@starfivetech.com>
Subject: [PATCH v4 2/9] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
Date: Thu, 29 Aug 2024 09:30:51 +0800	[thread overview]
Message-ID: <20240829013058.6178-3-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20240829013058.6178-1-minda.chen@starfivetech.com>

Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
---
 drivers/phy/Kconfig                    |   1 +
 drivers/phy/Makefile                   |   1 +
 drivers/phy/starfive/Kconfig           |  14 +++
 drivers/phy/starfive/Makefile          |   6 +
 drivers/phy/starfive/phy-jh7110-usb2.c | 166 +++++++++++++++++++++++++
 5 files changed, 188 insertions(+)
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index e12347e8a0..f940648fe5 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -309,5 +309,6 @@ source "drivers/phy/cadence/Kconfig"
 source "drivers/phy/ti/Kconfig"
 source "drivers/phy/qcom/Kconfig"
 source "drivers/phy/renesas/Kconfig"
+source "drivers/phy/starfive/Kconfig"
 
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 7a2b764492..6ac867350c 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -44,3 +44,4 @@ obj-y += cadence/
 obj-y += ti/
 obj-y += qcom/
 obj-y += renesas/
+obj-y += starfive/
diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
new file mode 100644
index 0000000000..f28529d1f9
--- /dev/null
+++ b/drivers/phy/starfive/Kconfig
@@ -0,0 +1,14 @@
+#
+# PHY drivers for Starfive platforms
+#
+
+menu "Starfive PHY driver"
+
+config PHY_STARFIVE_JH7110_USB2
+	bool "Starfive JH7110 USB 2.0 PHY driver"
+	select PHY
+	help
+	  Enable this to support the Starfive JH7110 USB 2.0 PHY.
+	  Generic PHY driver JH7110 USB 2.0.
+
+endmenu
diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
new file mode 100644
index 0000000000..a405a75e34
--- /dev/null
+++ b/drivers/phy/starfive/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Starfive
+#
+
+obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2)	+= phy-jh7110-usb2.o
diff --git a/drivers/phy/starfive/phy-jh7110-usb2.c b/drivers/phy/starfive/phy-jh7110-usb2.c
new file mode 100644
index 0000000000..6b5780e5fd
--- /dev/null
+++ b/drivers/phy/starfive/phy-jh7110-usb2.c
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * StarFive JH7110 USB 2.0 PHY driver
+ *
+ * Copyright (C) 2024 StarFive Technology Co., Ltd.
+ * Author: Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <errno.h>
+#include <generic-phy.h>
+#include <regmap.h>
+#include <soc.h>
+#include <syscon.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+
+#define USB_LS_KEEPALIVE_OFF		0x4
+#define USB_LS_KEEPALIVE_ENABLE		BIT(4)
+#define USB_PHY_CLK_RATE		125000000
+
+struct jh7110_usb2_phy {
+	struct phy *phy;
+	struct regmap *sys_syscon;
+	void __iomem *regs;
+	struct clk *usb_125m_clk;
+	struct clk *app_125m;
+	struct regmap_field *usb_split;
+	enum phy_mode mode;
+};
+
+static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
+{
+	/* Host mode enable the LS speed keep-alive signal */
+	if (set)
+		clrsetbits_le32(phy->regs + USB_LS_KEEPALIVE_OFF,
+				USB_LS_KEEPALIVE_ENABLE,
+				USB_LS_KEEPALIVE_ENABLE);
+	else
+		clrsetbits_le32(phy->regs + USB_LS_KEEPALIVE_OFF,
+				USB_LS_KEEPALIVE_ENABLE, 0);
+}
+
+static int usb2_phy_set_mode(struct phy *_phy,
+			     enum phy_mode mode, int submode)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+	if (mode == phy->mode)
+		return 0;
+
+	switch (mode) {
+	case PHY_MODE_USB_HOST:
+	case PHY_MODE_USB_DEVICE:
+	case PHY_MODE_USB_OTG:
+		dev_dbg(dev, "Changing phy to %d\n", mode);
+		phy->mode = mode;
+		usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* set default split usb 2.0 only mode */
+	regmap_field_write(phy->usb_split, true);
+
+	return 0;
+}
+
+static int jh7110_usb2_phy_init(struct phy *_phy)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	ret = clk_set_rate(phy->usb_125m_clk, USB_PHY_CLK_RATE);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set 125m clock\n");
+		return ret;
+	}
+
+	return clk_prepare_enable(phy->app_125m);
+}
+
+static int jh7110_usb2_phy_exit(struct phy *_phy)
+{
+	struct udevice *dev = _phy->dev;
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+	clk_disable_unprepare(phy->app_125m);
+
+	return 0;
+}
+
+struct phy_ops jh7110_usb2_phy_ops = {
+	.init     = jh7110_usb2_phy_init,
+	.exit     = jh7110_usb2_phy_exit,
+	.set_mode = usb2_phy_set_mode,
+};
+
+int jh7110_usb2_phy_probe(struct udevice *dev)
+{
+	struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+	struct ofnode_phandle_args sys_phandle;
+	struct reg_field usb_split;
+	int ret;
+
+	phy->regs = dev_read_addr_ptr(dev);
+	if (!phy->regs)
+		return -EINVAL;
+
+	ret = dev_read_phandle_with_args(dev, "starfive,sys-syscon", NULL, 1, 0,
+					 &sys_phandle);
+
+	if (ret < 0) {
+		dev_err(dev, "Can't get sys cfg phandle: %d\n", ret);
+		return ret;
+	}
+
+	phy->sys_syscon = syscon_node_to_regmap(sys_phandle.node);
+	if (IS_ERR(phy->sys_syscon)) {
+		dev_err(dev, "Can't get syscon regmap: %d\n", ret);
+		return PTR_ERR(phy->sys_syscon);
+	}
+
+	usb_split.reg = sys_phandle.args[0];
+	usb_split.lsb = 17;
+	usb_split.msb = 17;
+	phy->usb_split = devm_regmap_field_alloc(dev, phy->sys_syscon, usb_split);
+	if (IS_ERR(phy->usb_split)) {
+		dev_err(dev, "USB split field init failed\n");
+		return PTR_ERR(phy->usb_split);
+	}
+
+	phy->usb_125m_clk = devm_clk_get(dev, "125m");
+	if (IS_ERR(phy->usb_125m_clk)) {
+		dev_err(dev, "Failed to get 125m clock\n");
+		return PTR_ERR(phy->usb_125m_clk);
+	}
+
+	phy->app_125m = devm_clk_get(dev, "app_125m");
+	if (IS_ERR(phy->app_125m)) {
+		dev_err(dev, "Failed to get app 125m clock\n");
+		return PTR_ERR(phy->app_125m);
+	}
+
+	return 0;
+}
+
+static const struct udevice_id jh7110_usb2_phy[] = {
+	{ .compatible = "starfive,jh7110-usb-phy"},
+	{},
+};
+
+U_BOOT_DRIVER(jh7110_usb2_phy) = {
+	.name = "jh7110_usb2_phy",
+	.id = UCLASS_PHY,
+	.of_match = jh7110_usb2_phy,
+	.probe = jh7110_usb2_phy_probe,
+	.ops = &jh7110_usb2_phy_ops,
+	.priv_auto	= sizeof(struct jh7110_usb2_phy),
+};
-- 
2.17.1


  parent reply	other threads:[~2024-08-29  1:31 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-29  1:30 [PATCH v4 0/9] Add Starfive JH7110 Cadence USB driver Minda Chen
2024-08-29  1:30 ` [PATCH v4 1/9] usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode() Minda Chen
2024-08-30  1:11   ` Marek Vasut
2024-08-29  1:30 ` Minda Chen [this message]
2024-08-30  1:15   ` [PATCH v4 2/9] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver Marek Vasut
2024-09-06  8:08     ` Minda Chen
2024-09-06 17:23       ` Marek Vasut
2024-08-29  1:30 ` [PATCH v4 3/9] phy: starfive: Add Starfive JH7110 PCIe " Minda Chen
2024-08-30  1:17   ` Marek Vasut
2024-08-29  1:30 ` [PATCH v4 4/9] usb: cdns: starfive: Add cdns USB driver Minda Chen
2024-08-30  1:20   ` Marek Vasut
2024-08-29  1:30 ` [PATCH v4 5/9] spl: starfive: visionfive2: Disable USB overcurrent pin by default Minda Chen
2024-10-26 16:23   ` E Shattow
2024-08-29  1:30 ` [PATCH v4 6/9] configs: starfive: Add visionfive2 cadence USB configuration Minda Chen
2024-08-29  1:30 ` [PATCH v4 7/9] dts: starfive: Add JH7110 Cadence USB dts node Minda Chen
2024-08-29  4:47   ` Sumit Garg
2024-08-29  4:57     ` E Shattow
2024-08-30  5:52       ` Minda Chen
2024-08-29  1:30 ` [PATCH v4 8/9] spl: starfive: star64: Setup USB fdt fixup function Minda Chen
2024-08-30  3:30   ` E Shattow
2024-08-29  1:30 ` [PATCH v4 9/9] MAINTAINERS: Update Starfive visionfive2 maintain files Minda Chen

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