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Fri, 14 Mar 2025 09:34:27 -0700 (PDT) Received: from bill-the-cat ([187.192.142.234]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7c573c9d641sm275226585a.65.2025.03.14.09.34.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Mar 2025 09:34:25 -0700 (PDT) Date: Fri, 14 Mar 2025 10:34:22 -0600 From: Tom Rini To: Stefan Eichenberger Cc: stefan.eichenberger@toradex.com, s-k6@ti.com, w.egorov@phytec.de, n-francis@ti.com, emanuele.ghidoli@toradex.com, francesco.dolcini@toradex.com, u-boot@lists.denx.de Subject: Re: [PATCH v1] common/memsize.c: Fix get_ram_size() original data restore Message-ID: <20250314163422.GV2640854@bill-the-cat> References: <20250314100734.23777-1-eichest@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="dBHT2OMncpuQau0T" Content-Disposition: inline In-Reply-To: <20250314100734.23777-1-eichest@gmail.com> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean --dBHT2OMncpuQau0T Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Mar 14, 2025 at 11:06:49AM +0100, Stefan Eichenberger wrote: > From: Stefan Eichenberger >=20 > The get_ram_size() function fails to restore the original RAM data when > the data cache is enabled. This issue was observed on an AM625 R5 SPL > with 512MB of RAM and is a regression that became visible with > commit bc07851897bd ("board: ti: Pull redundant DDR functions to a common > location and Fixup DDR size when ECC is enabled"). >=20 > Observed boot failure messages: > Warning: Did not detect image signing certificate. Skipping authenticat= ion to prevent boot failure. This will fail on Security Enforcing(HS-SE) de= vices > Authentication passed > Starting ATF on ARM64 core... >=20 > The system then hangs. This indicates that without a data cache flush, > data in the cache is not coherent with RAM, preventing the system from > booting. This was verified by printing the content of this address when > the issue occurs. >=20 > Add a data cache flush after each restore operation to resolve this > issue. >=20 > Fixes: bc07851897bd ("board: ti: Pull redundant DDR functions to a common= location and Fixup DDR size when ECC is enabled") > Fixes: 1c64b98c1ec4 ("common/memsize.c: Fix get_ram_size() when cache is = enabled") > Signed-off-by: Stefan Eichenberger > --- > common/memsize.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Ugh. Is there not a chance the problem being that we need a dcache_flush_all() in the K3 ddr code somewhere? I'm just trying to see how we got here and I notice now that yes, this does look like it finishes what 1c64b98c1ec4 started but in hindsight was that showing something else needing to be fixed? --=20 Tom --dBHT2OMncpuQau0T Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmfUWocACgkQFHw5/5Y0 tyypyAwAhMKPPirLMGQ3Z8zdqf17P7OULPphtLKlM+mytW58JanisE2obEJAhp1q 7nwFAMfxnc/zN3d7iA7Ad2JNriY60UyUd6my7Ns7+xOCrSh5kV8LUpUn7CYEuv3l p980htry7tVZXE48l8U0TQps+1/ye3v7kZEV3yR5ETssrRQ/g0PnvBcbm8klN2L0 dAFOCsoLME7vD/q39fsKL03lyfLZfwhzK6MJYHAFR/Gg8wKkQYxU7bp11/3fvDrr 0jjjxlN12Wn+L5qHfJlsLC/9/RgmrxB+0xBUIxULOmPHyMkpJ7z0YaeYcsVlnwiw rmNf5sCgWoajc7soDPcLP4MvdG+jCoZdWM/QQBGl2wS161XQUpmf11Bh1/GS03mf H7XzlyMRAFB/Ewk+vqSYXSFZwFbXg6G7ZFpeCqOYuQP1ZDiKw+9ZBm6MZmxeJt+N GBnWS1S/AOtpYUm/cjUrRZ9rPYJsCqzqKyb6cWToM2Xd54U1LBAVqCv7JiJxVG5H bxsbA9+n =fSso -----END PGP SIGNATURE----- --dBHT2OMncpuQau0T--