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From: Christian Marangi <ansuelsmth@gmail.com>
To: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,
	Tom Rini <trini@konsulko.com>, Lukasz Majewski <lukma@denx.de>,
	Sean Anderson <seanga2@gmail.com>,
	Sumit Garg <sumit.garg@linaro.org>,
	Christian Marangi <ansuelsmth@gmail.com>,
	Simon Glass <sjg@chromium.org>, Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	u-boot@lists.denx.de
Subject: [PATCH v2 4/6] arm64: dts: airoha: en7581: Add Clock Controller node
Date: Fri, 14 Mar 2025 19:59:24 +0100	[thread overview]
Message-ID: <20250314185941.27834-5-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20250314185941.27834-1-ansuelsmth@gmail.com>

Add Clock Controller node for EN7581 SoC to correctly expose supported
clock for any user in the SoC.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250105150328.15172-1-ansuelsmth@gmail.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

[ upstream commit: 7693017580e9be839fa5f27130bb6500f3597595 ]
---
 dts/upstream/src/arm64/airoha/en7581.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/dts/upstream/src/arm64/airoha/en7581.dtsi b/dts/upstream/src/arm64/airoha/en7581.dtsi
index 55eb1762fb1..f584409e72c 100644
--- a/dts/upstream/src/arm64/airoha/en7581.dtsi
+++ b/dts/upstream/src/arm64/airoha/en7581.dtsi
@@ -2,6 +2,7 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/en7523-clk.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -142,6 +143,13 @@
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
 		};
 
+		scuclk: clock-controller@1fa20000 {
+			compatible = "airoha,en7581-scu";
+			reg = <0x0 0x1fb00000 0x0 0x970>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		uart1: serial@1fbf0000 {
 			compatible = "ns16550";
 			reg = <0x0 0x1fbf0000 0x0 0x30>;
-- 
2.48.1


  parent reply	other threads:[~2025-03-14 19:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-14 18:59 [PATCH v2 0/6] airoha: Add initial support AN7581 Christian Marangi
2025-03-14 18:59 ` [PATCH v2 1/6] airoha: Add initial support for Airoha AN7581 SoC Christian Marangi
2025-03-14 18:59 ` [PATCH v2 2/6] clk: airoha: Add support for Airoha AN7581 SoC clock Christian Marangi
2025-03-14 18:59 ` [PATCH v2 3/6] reset: airoha: Add driver for controlling reset line of AN7581 Christian Marangi
2025-03-14 18:59 ` Christian Marangi [this message]
2025-03-14 18:59 ` [PATCH v2 5/6] dt-bindings: clock: drop NUM_CLOCKS define for EN7581 Christian Marangi
2025-03-27 14:43   ` Krzysztof Kozlowski
2025-03-27 14:50     ` Christian Marangi
2025-03-27 14:58       ` Krzysztof Kozlowski
2025-04-01 14:44         ` Tom Rini
2025-04-01 14:56           ` Conor Dooley
2025-04-01 15:27           ` Krzysztof Kozlowski
2025-04-01 16:40             ` Tom Rini
2025-04-01 17:28               ` Krzysztof Kozlowski
2025-04-01 18:02                 ` Tom Rini
2025-04-02  7:12                   ` Sumit Garg
2025-04-02 14:16                     ` Tom Rini
2025-03-14 18:59 ` [PATCH v2 6/6] dt-bindings: clock: add ID for eMMC " Christian Marangi
2025-03-27 14:44   ` Krzysztof Kozlowski
2025-03-14 20:26 ` [PATCH v2 0/6] airoha: Add initial support AN7581 Tom Rini
2025-03-27 14:20   ` Christian Marangi
2025-04-01 10:45 ` Andreas Gnau
2025-04-01 10:50   ` Christian Marangi
2025-04-01 20:36 ` Tom Rini

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