From: E Shattow <e@freeshell.de>
To: Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
Minda Chen <minda.chen@starfivetech.com>,
Hal Feng <hal.feng@starfivetech.com>,
Tom Rini <trini@konsulko.com>
Cc: E Shattow <e@freeshell.de>, u-boot@lists.denx.de
Subject: [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults
Date: Sat, 3 May 2025 05:29:44 -0700 [thread overview]
Message-ID: <20250503122952.973129-1-e@freeshell.de> (raw)
JH7110 drivers are missing support for CPU frequency scaling, so override
upstream device-tree to use default clock rates for syscrg. This override
duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal.
Signed-off-by: E Shattow <e@freeshell.de>
---
arch/riscv/dts/jh7110-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi
index a9e318c4a31..13adbb6922c 100644
--- a/arch/riscv/dts/jh7110-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-u-boot.dtsi
@@ -108,6 +108,7 @@
&syscrg {
bootph-pre-ram;
+ assigned-clock-rates = <0>; /* cpufreq not implemented, use defaults */
};
&stgcrg {
base-commit: 6cc812f8cc55c132458c7da5b9fb7666315cbe8c
--
2.49.0
next reply other threads:[~2025-05-03 12:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-03 12:29 E Shattow [this message]
2025-05-03 21:34 ` [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults E Shattow
2025-05-08 8:29 ` Leo Liang
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