From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: trini@konsulko.com
Cc: Mayuresh Chitale <mchitale@ventanamicro.com>, u-boot@lists.denx.de
Subject: [PATCH] Revert "riscv: Select appropriate image type"
Date: Thu, 29 May 2025 03:30:50 +0000 [thread overview]
Message-ID: <20250529033052.399573-2-mchitale@ventanamicro.com> (raw)
In-Reply-To: <20250529033052.399573-1-mchitale@ventanamicro.com>
This reverts commit 027a316828528da95a77d20632370b1bc2823f0b as
discussed in [1].
[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
arch/riscv/dts/binman.dtsi | 14 ++++----------
arch/riscv/include/asm/u-boot.h | 4 ----
2 files changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index c5b0464d6a7..b518560bb94 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -5,12 +5,6 @@
#include <config.h>
-#ifdef CONFIG_64BIT
-#define ARCH "riscv64"
-#else
-#define ARCH "riscv"
-
-#endif
/ {
binman: binman {
multiple-images;
@@ -37,7 +31,7 @@
description = "U-Boot";
type = "standalone";
os = "U-Boot";
- arch = ARCH;
+ arch = "riscv";
compression = "none";
load = /bits/ 64 <CONFIG_TEXT_BASE>;
@@ -49,7 +43,7 @@
description = "Linux";
type = "standalone";
os = "Linux";
- arch = ARCH;
+ arch = "riscv";
compression = "none";
load = /bits/ 64 <CONFIG_TEXT_BASE>;
@@ -62,7 +56,7 @@
tee {
description = "OP-TEE";
type = "tee";
- arch = ARCH;
+ arch = "riscv";
compression = "none";
os = "tee";
load = /bits/ 64 <CONFIG_SPL_OPTEE_LOAD_ADDR>;
@@ -76,7 +70,7 @@
description = "OpenSBI fw_dynamic Firmware";
type = "firmware";
os = "opensbi";
- arch = ARCH;
+ arch = "riscv";
compression = "none";
load = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
entry = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h
index a90cc4c21cf..d5e1d5f3231 100644
--- a/arch/riscv/include/asm/u-boot.h
+++ b/arch/riscv/include/asm/u-boot.h
@@ -23,10 +23,6 @@
#include <asm/u-boot-riscv.h>
/* For image.h:image_check_target_arch() */
-#ifdef CONFIG_64BIT
-#define IH_ARCH_DEFAULT IH_ARCH_RISCV64
-#else
#define IH_ARCH_DEFAULT IH_ARCH_RISCV
-#endif
#endif /* _U_BOOT_H_ */
--
2.43.0
next prev parent reply other threads:[~2025-05-29 3:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-29 3:30 [PATCH] Revert "booti/bootm: riscv: Verify image arch type" Mayuresh Chitale
2025-05-29 3:30 ` Mayuresh Chitale [this message]
2025-06-02 8:10 ` [PATCH] Revert "riscv: Select appropriate image type" Leo Liang
2025-05-29 3:30 ` [PATCH] Revert "riscv: image: Add new image type for RV64" Mayuresh Chitale
2025-06-02 8:11 ` Leo Liang
2025-06-02 8:09 ` [PATCH] Revert "booti/bootm: riscv: Verify image arch type" Leo Liang
2025-06-02 12:09 ` Quentin Schulz
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250529033052.399573-2-mchitale@ventanamicro.com \
--to=mchitale@ventanamicro.com \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox