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To properly distinguish them, the BFPT DTR bit needs to be checked. If DTR is set, the device is identified as the D version instead of the C version. This patch: - Adds CONFIG_SPI_FLASH_XMC to reuse Spansion/Winbond code paths for configuration register handling and quad enable logic. - Extends spi_nor_parse_bfpt() to check DTR and rename the device from "C" to "D" when required. - Ensures spi_nor_init_params() keeps the correct flash name. Signed-off-by: Ssunk --- drivers/mtd/spi/spi-nor-core.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 76c33b24368..a00d82057da 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -578,7 +578,7 @@ static int read_fsr(struct spi_nor *nor) * location. Return the configuration register value. * Returns negative if error occurred. */ -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) static int read_cr(struct spi_nor *nor) { int ret; @@ -2204,7 +2204,7 @@ static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 addr_base, } #endif -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) /* * Write status Register and configuration register with 2 bytes * The first byte will be written to the status register, while the @@ -2630,6 +2630,21 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, break; } + if (strcmp(mtd->name, "XM25QH512C") == 0) + { + if (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_DTR) + { + mtd->name = "XM25QH512D"; + } + } + if (strcmp(mtd->name, "XM25QH256C") == 0) + { + if (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_DTR) + { + mtd->name = "XM25QH256D"; + } + } + /* Flash Memory Density (in bits). */ params->size = bfpt.dwords[BFPT_DWORD(2)]; if (params->size & BIT(31)) { @@ -2710,7 +2725,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, case BFPT_DWORD15_QER_NONE: params->quad_enable = NULL; break; -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: params->quad_enable = spansion_no_read_cr_quad_enable; @@ -2721,7 +2736,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, params->quad_enable = macronix_quad_enable; break; #endif -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) case BFPT_DWORD15_QER_SR2_BIT1: params->quad_enable = spansion_read_cr_quad_enable; break; @@ -3094,6 +3109,11 @@ static int spi_nor_init_params(struct spi_nor *nor, #endif } +#ifdef CONFIG_SPI_FLASH_XMC + if (JEDEC_MFR(info) == SNOR_MFR_ST) + nor->mtd.name = info->name; +#endif + /* (Fast) Read settings. */ params->hwcaps.mask |= SNOR_HWCAPS_READ; spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ], @@ -3166,7 +3186,7 @@ static int spi_nor_init_params(struct spi_nor *nor, break; default: -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) /* Kept only for backward compatibility purpose. */ params->quad_enable = spansion_read_cr_quad_enable; #endif -- 2.34.1