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[187.190.202.235]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7c51b0598e2sm1736211a34.31.2025.10.24.11.02.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Oct 2025 11:02:22 -0700 (PDT) Date: Fri, 24 Oct 2025 12:02:19 -0600 From: Tom Rini To: Anshul Dalal Cc: u-boot@lists.denx.de, Beleswar Padhi , Nishanth Menon , Andrew Davis , Bryan Brattlof , Vignesh R Subject: Re: [PATCH v2 0/8] Add support for TI AM6254atl SiP Message-ID: <20251024180219.GS6688@bill-the-cat> References: <20251024-62sip_support-v2-0-23d4948af70c@ti.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="vUpIySyEjqXSXV/c" Content-Disposition: inline In-Reply-To: <20251024-62sip_support-v2-0-23d4948af70c@ti.com> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean --vUpIySyEjqXSXV/c Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Oct 24, 2025 at 02:02:54PM +0530, Anshul Dalal wrote: > Hi all, >=20 > This patch series adds support for AM6254atl SiP (or AM62x SiP for > short) to U-Boot. >=20 > The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]: >=20 > AM6254atl > |||| > |||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4) > ||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores) > |+---- Silicon PG Revision (A indicates SR 1.0) > +----- Core configuration (4 indicates A53's in Quad core config) >=20 > AM62x SiP provides the existing AM62x SoC with 512MiB of DDR > integrated in a single packages. The first 4 patches in the series > are cherry-picked from the devicetree-rebasing repository at > 'v6.18-rc2-dts'. >=20 > Signed-off-by: Anshul Dalal > --- > Changes in v2: > - Add a new-line at the end of env file > - Update the dependencies and rebase to master > - Remove bloblist addr from the A53 defconfig > - Link to v1: > https://lore.kernel.org/r/20251022-62sip_support-v1-0-eed08d15e76d@ti.com >=20 > --- > Anshul Dalal (7): > arm64: dts: ti: k3-am62*: remove SoC dtsi from common dtsi > arm64: dts: ti: Introduce base support for AM6254atl SiP > arm64: dts: ti: Add support for AM6254atl SiP SK These are cherry-picks and should be separate and as-is, good. > arm: dts: add support for AM6254atl at R5 SPL > configs: add defconfigs for AM6254atl > board: am62x: add env file for AM6254atl > doc: add documentation for AM6254atl SiP This should just be a commit that adds AM6254atl SiP support, not 4 commits. > Beleswar Padhi (1): > arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node And this being separate makes sense. --=20 Tom --vUpIySyEjqXSXV/c Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTzzqh0PWDgGS+bTHor4qD1Cr/kCgUCaPu/KAAKCRAr4qD1Cr/k CryTAP9qYXzsVxkzVYZ4BEoQqWPNQnczv6Hoepfge6qehLNx9gEAsUAUrpC7Z8wB c+UYWM0zSfPAJ9qBP3ghgdXH93ZnJwo= =8xq7 -----END PGP SIGNATURE----- --vUpIySyEjqXSXV/c--