Re: [PATCH v1 1/3] ram: starfive: drop references to 16GB memory size

E Shattow
2025-11-03T04:22:17Z

On 10/30/25 00:53, Heinrich Schuchardt wrote:
> On 10/30/25 07:23, E Shattow wrote:
>> 16GB memory size is not addressable on StarFive JH-7110 SoC because the
>> DRAM uncached alias begins at +8GB offset from start of DRAM. The logic
>> for 16GB memory size is a fall-through to the default for an unknown
>> size.
>> Let's drop this unnecessary 16GB memory size and rely on the case
>> default.
>>
>> Signed-off-by: E Shattow <e@freeshell.de>
>> ---
>>   drivers/ram/starfive/ddrcsr_boot.c  | 3 ---
>>   drivers/ram/starfive/ddrphy_start.c | 1 -
>>   drivers/ram/starfive/starfive_ddr.c | 1 -
>>   drivers/ram/starfive/starfive_ddr.h | 1 -
>>   4 files changed, 6 deletions(-)
>>
>> diff --git a/drivers/ram/starfive/ddrcsr_boot.c b/drivers/ram/
>> starfive/ddrcsr_boot.c
>> index 6764b3ed5cc..ece6f5aae94 100644
>> --- a/drivers/ram/starfive/ddrcsr_boot.c
>> +++ b/drivers/ram/starfive/ddrcsr_boot.c
>> @@ -231,7 +231,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32
>> *phyreg, enum ddr_size_t size)
>>           mask = REG8G;
>>           break;
>>   -    case DDR_SIZE_16G:
>>       default:
>>           return;
>>       };
>> @@ -260,7 +259,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32
>> *phyreg, enum ddr_size_t size)
>>           out_le32(csrreg + REGOFFSET(0x10), 0x3c);
>>           break;
>>   -    case DDR_SIZE_16G:
>>       default:
>>           break;
>>       };
>> @@ -286,7 +284,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32
>> *phyreg, enum ddr_size_t size)
>>           break;
>>         case DDR_SIZE_2G:
>
> Why don't we drop the line above? It is just falling through to default.
>
> Best regards
>
> Heinrich
>

I hesitate to remove reachable code that is more readable and easily
searchable, without a technical document published to refer to about how
to initialize DDR memory. Here is code-as-documentation and the
verbosity is helpful.

>> -    case DDR_SIZE_16G:
>>       default:
>>           break;
>>       };
>> diff --git a/drivers/ram/starfive/ddrphy_start.c b/drivers/ram/
>> starfive/ddrphy_start.c
>> index efe3f8a181a..f26bc9ccaad 100644
>> --- a/drivers/ram/starfive/ddrphy_start.c
>> +++ b/drivers/ram/starfive/ddrphy_start.c
>> @@ -267,7 +267,6 @@ void ddr_phy_start(u32 *phyreg, enum ddr_size_t size)
>>           mask = REG8G;
>>           break;
>>   -    case DDR_SIZE_16G:
>>       default:
>>           return;
>>       };
>> diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/
>> starfive/starfive_ddr.c
>> index b31ed3bcf61..9e902f03ee9 100644
>> --- a/drivers/ram/starfive/starfive_ddr.c
>> +++ b/drivers/ram/starfive/starfive_ddr.c
>> @@ -47,7 +47,6 @@ static int starfive_ddr_setup(struct udevice *dev,
>> struct starfive_ddr_priv *pri
>>           size = DDR_SIZE_8G;
>>           break;
>>   -    case 0x400000000:
>>       default:
>>           pr_err("unsupport size %lx\n", priv->info.size);
>>           return -EINVAL;
>> diff --git a/drivers/ram/starfive/starfive_ddr.h b/drivers/ram/
>> starfive/starfive_ddr.h
>> index c29d26b510c..3ab0b0e8fa6 100644
>> --- a/drivers/ram/starfive/starfive_ddr.h
>> +++ b/drivers/ram/starfive/starfive_ddr.h
>> @@ -48,7 +48,6 @@ enum ddr_size_t {
>>       DDR_SIZE_2G,
>>       DDR_SIZE_4G,
>>       DDR_SIZE_8G,
>> -    DDR_SIZE_16G,
>>   };
>>     void ddr_phy_train(u32 *phyreg);
>
-E