* [PATCH] spi-nor: add support for XM25QH01D @ 2025-08-27 10:58 Ssunk 2025-11-02 11:14 ` Ssunk 2025-11-02 13:58 ` Marek Vasut 0 siblings, 2 replies; 10+ messages in thread From: Ssunk @ 2025-08-27 10:58 UTC (permalink / raw) To: u-boot Cc: jagan, vigneshr, tudor.ambarus, trini, Takahiro.Kuwano, marek.vasut+renesas, pratyush, Ssunk Add support for the XMC XM25QH01D SPI NOR flash. This device has 1Gbit (128MB) capacity, with 64KB sectors and supports 4KB erase, dual and quad read modes, and 4-byte opcodes. Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf Signed-off-by: Ssunk <ssunkkan@gmail.com> --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 0383175beb5..330ab77ee5d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -603,6 +603,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_XTX /* XTX Technology Limited */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] spi-nor: add support for XM25QH01D 2025-08-27 10:58 [PATCH] spi-nor: add support for XM25QH01D Ssunk @ 2025-11-02 11:14 ` Ssunk 2025-11-02 13:58 ` Marek Vasut 1 sibling, 0 replies; 10+ messages in thread From: Ssunk @ 2025-11-02 11:14 UTC (permalink / raw) To: u-boot Cc: Ssunk, jagan, vigneshr, tudor.ambarus, trini, Takahiro.Kuwano, marek.vasut+renesas, pratyush Hi all, Gentle ping — any comments on this patch? Link: https://lore.kernel.org/u-boot/20250827105854.10746-1-ssunkkan@gmail.com/ Thanks, Ssunk ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] spi-nor: add support for XM25QH01D 2025-08-27 10:58 [PATCH] spi-nor: add support for XM25QH01D Ssunk 2025-11-02 11:14 ` Ssunk @ 2025-11-02 13:58 ` Marek Vasut 2025-11-03 11:12 ` [PATCH v2] " Ssunk 1 sibling, 1 reply; 10+ messages in thread From: Marek Vasut @ 2025-11-02 13:58 UTC (permalink / raw) To: Ssunk, u-boot, tudor.ambarus, trini Cc: jagan, vigneshr, Takahiro.Kuwano, pratyush On 8/27/25 12:58 PM, Ssunk wrote: > Add support for the XMC XM25QH01D SPI NOR flash. > > This device has 1Gbit (128MB) capacity, with 64KB sectors and > supports 4KB erase, dual and quad read modes, and 4-byte opcodes. > Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf > > Signed-off-by: Ssunk <ssunkkan@gmail.com> > --- > drivers/mtd/spi/spi-nor-ids.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c > index 0383175beb5..330ab77ee5d 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -603,6 +603,7 @@ const struct flash_info spi_nor_ids[] = { > { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > #endif > #ifdef CONFIG_SPI_FLASH_XTX > /* XTX Technology Limited */ Keep the list sorted please. +CC Tom, Tudor. ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2] spi-nor: add support for XM25QH01D 2025-11-02 13:58 ` Marek Vasut @ 2025-11-03 11:12 ` Ssunk 2025-11-03 12:38 ` Marek Vasut 0 siblings, 1 reply; 10+ messages in thread From: Ssunk @ 2025-11-03 11:12 UTC (permalink / raw) To: marek.vasut Cc: u-boot, tudor.ambarus, trini, jagan, vigneshr, Takahiro.Kuwano, pratyush, Ssunk Add support for the XMC XM25QH01D SPI NOR flash. This device has 1Gbit (128MB) capacity, with 64KB sectors and supports 4KB erase, dual and quad read modes, and 4-byte opcodes. Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf Changes in v2: - Keep the list sorted of XMC Signed-off-by: Ssunk <ssunkkan@gmail.com> --- drivers/mtd/spi/spi-nor-ids.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 0383175beb5..03596d38e6e 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -595,13 +595,14 @@ const struct flash_info spi_nor_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, - { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_XTX -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2] spi-nor: add support for XM25QH01D 2025-11-03 11:12 ` [PATCH v2] " Ssunk @ 2025-11-03 12:38 ` Marek Vasut 2025-11-04 11:03 ` Ssunk 0 siblings, 1 reply; 10+ messages in thread From: Marek Vasut @ 2025-11-03 12:38 UTC (permalink / raw) To: Ssunk Cc: u-boot, tudor.ambarus, trini, jagan, vigneshr, Takahiro.Kuwano, pratyush On 11/3/25 12:12 PM, Ssunk wrote: > Add support for the XMC XM25QH01D SPI NOR flash. > > This device has 1Gbit (128MB) capacity, with 64KB sectors and > supports 4KB erase, dual and quad read modes, and 4-byte opcodes. > Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf > > Changes in v2: > - Keep the list sorted of XMC > > Signed-off-by: Ssunk <ssunkkan@gmail.com> > --- > drivers/mtd/spi/spi-nor-ids.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c > index 0383175beb5..03596d38e6e 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -595,13 +595,14 @@ const struct flash_info spi_nor_ids[] = { > #endif > #ifdef CONFIG_SPI_FLASH_XMC > /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ > + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > - { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > - { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, I'm sorry, my original suggestion was unclear. If you want to sort the whole XMC part list, then please do 2-patch series, sort the list in patch 1/2 and then add the chip in 2/2 . ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] spi-nor: add support for XM25QH01D 2025-11-03 12:38 ` Marek Vasut @ 2025-11-04 11:03 ` Ssunk 2025-11-09 19:01 ` Marek Vasut 0 siblings, 1 reply; 10+ messages in thread From: Ssunk @ 2025-11-04 11:03 UTC (permalink / raw) To: marek.vasut Cc: Takahiro.Kuwano, jagan, pratyush, ssunkkan, trini, tudor.ambarus, u-boot, vigneshr Hello Marek, >I'm sorry, my original suggestion was unclear. > >If you want to sort the whole XMC part list, then please do 2-patch >series, sort the list in patch 1/2 and then add the chip in 2/2 . Thanks for the clarification! Actually, I don’t intend to sort the whole XMC flash list — I only want to add the new XM25QH01D entry. Would it be acceptable if I just place it in the appropriate position without reordering the rest of the list? Best regards, Ssunk >On 11/3/25 12:12 PM, Ssunk wrote: >> Add support for the XMC XM25QH01D SPI NOR flash. >> >> This device has 1Gbit (128MB) capacity, with 64KB sectors and >> supports 4KB erase, dual and quad read modes, and 4-byte opcodes. >> Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf >> >> Changes in v2: >> - Keep the list sorted of XMC >> >> Signed-off-by: Ssunk <ssunkkan@gmail.com> >> --- >> drivers/mtd/spi/spi-nor-ids.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c >> index 0383175beb5..03596d38e6e 100644 >> --- a/drivers/mtd/spi/spi-nor-ids.c >> +++ b/drivers/mtd/spi/spi-nor-ids.c >> @@ -595,13 +595,14 @@ const struct flash_info spi_nor_ids[] = { >> #endif >> #ifdef CONFIG_SPI_FLASH_XMC >> /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ >> + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >> { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> - { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >> - { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >> { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >> + { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >> { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, >I'm sorry, my original suggestion was unclear. > >If you want to sort the whole XMC part list, then please do 2-patch >series, sort the list in patch 1/2 and then add the chip in 2/2 . ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] spi-nor: add support for XM25QH01D 2025-11-04 11:03 ` Ssunk @ 2025-11-09 19:01 ` Marek Vasut 2025-12-04 10:53 ` [PATCH v3] " Ssunk 0 siblings, 1 reply; 10+ messages in thread From: Marek Vasut @ 2025-11-09 19:01 UTC (permalink / raw) To: Ssunk Cc: Takahiro.Kuwano, jagan, pratyush, trini, tudor.ambarus, u-boot, vigneshr On 11/4/25 12:03 PM, Ssunk wrote: > Hello Marek, Hi, >> I'm sorry, my original suggestion was unclear. >> >> If you want to sort the whole XMC part list, then please do 2-patch >> series, sort the list in patch 1/2 and then add the chip in 2/2 . > > Thanks for the clarification! > > Actually, I don’t intend to sort the whole XMC flash list — I only want to > add the new XM25QH01D entry. Would it be acceptable if I just place it in the > appropriate position without reordering the rest of the list? Sure, this is fine by me. But please also try to get input from the subsystem maintainers. ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3] spi-nor: add support for XM25QH01D 2025-11-09 19:01 ` Marek Vasut @ 2025-12-04 10:53 ` Ssunk 2026-01-29 12:12 ` Ssunk 0 siblings, 1 reply; 10+ messages in thread From: Ssunk @ 2025-12-04 10:53 UTC (permalink / raw) To: Marek Vasut Cc: Ssunk, Takahiro.Kuwano, jagan, pratyush, trini, tudor.ambarus, u-boot, vigneshr Hi Marek, Thanks for the clarification. As discussed, I am not reordering the XMC flash list. This v3 only adds the new XM25QH01D entry in the appropriate alphabetical position, without touching the rest of the list. I welcome feedback from the SPI-NOR subsystem maintainers as well. Thanks again for the guidance! Regards, Ssunk --- [PATCH v3] spi-nor: add support for XM25QH01D Add support for the XMC XM25QH01D SPI NOR flash. This device has 1Gbit (128MB) capacity, with 64KB sectors and supports 4KB erase, dual/quad read, and 4-byte opcodes. Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf Changes in v3: - Do NOT reorder the XMC flash list (per Marek’s feedback) - Only add the XM25QH01D entry in the correct sorted position Changes in v2: - Attempted to reorder the list; reverted in v3 Signed-off-by: Ssunk <ssunkkan@gmail.com> --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 0383175beb5..00f78c2aaae 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -595,6 +595,7 @@ const struct flash_info spi_nor_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3] spi-nor: add support for XM25QH01D 2025-12-04 10:53 ` [PATCH v3] " Ssunk @ 2026-01-29 12:12 ` Ssunk 2026-01-29 13:04 ` Marek Vasut 0 siblings, 1 reply; 10+ messages in thread From: Ssunk @ 2026-01-29 12:12 UTC (permalink / raw) To: marek.vasut Cc: Takahiro.Kuwano, jagan, ssunkkan, pratyush, trini, tudor.ambarus, u-boot, vigneshr Hi Marek, Just a gentle ping on this patch below. Please let me know if any further changes are needed. Thanks, Ssunk ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] spi-nor: add support for XM25QH01D 2026-01-29 12:12 ` Ssunk @ 2026-01-29 13:04 ` Marek Vasut 0 siblings, 0 replies; 10+ messages in thread From: Marek Vasut @ 2026-01-29 13:04 UTC (permalink / raw) To: Ssunk, tudor.ambarus, Miquel Raynal, trini Cc: Takahiro.Kuwano, jagan, pratyush, u-boot, vigneshr On 1/29/26 1:12 PM, Ssunk wrote: > Hi Marek, > > Just a gentle ping on this patch below. > Please let me know if any further changes are needed. Adjusting the CC list slightly, this is really up to the SPI NOR maintainers. ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-01-29 13:29 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-08-27 10:58 [PATCH] spi-nor: add support for XM25QH01D Ssunk 2025-11-02 11:14 ` Ssunk 2025-11-02 13:58 ` Marek Vasut 2025-11-03 11:12 ` [PATCH v2] " Ssunk 2025-11-03 12:38 ` Marek Vasut 2025-11-04 11:03 ` Ssunk 2025-11-09 19:01 ` Marek Vasut 2025-12-04 10:53 ` [PATCH v3] " Ssunk 2026-01-29 12:12 ` Ssunk 2026-01-29 13:04 ` Marek Vasut
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