From: Ssunk <ssunkkan@gmail.com>
To: marek.vasut@mailbox.org
Cc: Takahiro.Kuwano@infineon.com, jagan@amarulasolutions.com,
pratyush@kernel.org, ssunkkan@gmail.com, trini@konsulko.com,
tudor.ambarus@linaro.org, u-boot@lists.denx.de, vigneshr@ti.com
Subject: Re: [PATCH v2] spi-nor: add support for XM25QH01D
Date: Tue, 4 Nov 2025 19:03:07 +0800 [thread overview]
Message-ID: <20251104110307.3993-1-ssunkkan@gmail.com> (raw)
In-Reply-To: <fda19051-7b72-4f11-aa8e-b8eb70ff04b7@mailbox.org>
Hello Marek,
>I'm sorry, my original suggestion was unclear.
>
>If you want to sort the whole XMC part list, then please do 2-patch
>series, sort the list in patch 1/2 and then add the chip in 2/2 .
Thanks for the clarification!
Actually, I don’t intend to sort the whole XMC flash list — I only want to
add the new XM25QH01D entry. Would it be acceptable if I just place it in the
appropriate position without reordering the rest of the list?
Best regards,
Ssunk
>On 11/3/25 12:12 PM, Ssunk wrote:
>> Add support for the XMC XM25QH01D SPI NOR flash.
>>
>> This device has 1Gbit (128MB) capacity, with 64KB sectors and
>> supports 4KB erase, dual and quad read modes, and 4-byte opcodes.
>> Datasheet link: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf
>>
>> Changes in v2:
>> - Keep the list sorted of XMC
>>
>> Signed-off-by: Ssunk <ssunkkan@gmail.com>
>> ---
>> drivers/mtd/spi/spi-nor-ids.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
>> index 0383175beb5..03596d38e6e 100644
>> --- a/drivers/mtd/spi/spi-nor-ids.c
>> +++ b/drivers/mtd/spi/spi-nor-ids.c
>> @@ -595,13 +595,14 @@ const struct flash_info spi_nor_ids[] = {
>> #endif
>> #ifdef CONFIG_SPI_FLASH_XMC
>> /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
>> + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>> { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>> { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>> { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>> - { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>> { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>> - { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>> { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>> + { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>> + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>> { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>I'm sorry, my original suggestion was unclear.
>
>If you want to sort the whole XMC part list, then please do 2-patch
>series, sort the list in patch 1/2 and then add the chip in 2/2 .
next prev parent reply other threads:[~2025-11-04 11:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 10:58 [PATCH] spi-nor: add support for XM25QH01D Ssunk
2025-11-02 11:14 ` Ssunk
2025-11-02 13:58 ` Marek Vasut
2025-11-03 11:12 ` [PATCH v2] " Ssunk
2025-11-03 12:38 ` Marek Vasut
2025-11-04 11:03 ` Ssunk [this message]
2025-11-09 19:01 ` Marek Vasut
2025-12-04 10:53 ` [PATCH v3] " Ssunk
2026-01-29 12:12 ` Ssunk
2026-01-29 13:04 ` Marek Vasut
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