* [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
@ 2025-11-04 22:30 Brian Sune
2025-11-18 14:05 ` Sune Brian
2025-11-19 10:54 ` Chee, Tien Fong
0 siblings, 2 replies; 8+ messages in thread
From: Brian Sune @ 2025-11-04 22:30 UTC (permalink / raw)
To: Tom Rini, u-boot
Add optimized Makefile support for SoCFPGA handoff
- Introduce socfpga_g5_hanoff_prepare target in U-Boot
arch/arm/mach-socfpga/config.mk
- Users can convert the handoff via make prepare.
- Detects Altera/Intel SoCFPGA boards from .config
- Combines vendor/board extraction into a single shell call
- Checks for hps_isw_handoff folder and .hiof files
- Uses ls -d instead of find for faster folder detection
- Runs BSP generator script only if files exist
- Non-blocking: continues if handoff folder or files are missing
- HANDOFF_PATH user define allows overriding auto-detected folder
- Minimizes subshells and other slow constructs for faster CI
Signed-off-by: Brian Sune <briansune@gmail.com>
---
arch/arm/mach-socfpga/config.mk | 50 +++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 arch/arm/mach-socfpga/config.mk
diff --git a/arch/arm/mach-socfpga/config.mk b/arch/arm/mach-socfpga/config.mk
new file mode 100644
index 00000000000..df1eb909129
--- /dev/null
+++ b/arch/arm/mach-socfpga/config.mk
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Brian Sune <briansune@gmail.com>
+
+ifeq ($(CONFIG_TARGET_SOCFPGA_CYCLONE5),y)
+archprepare: socfpga_g5_hanoff_prepare
+else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA5),y)
+archprepare: socfpga_g5_hanoff_prepare
+else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA10),y)
+archprepare: socfpga_g5_hanoff_prepare
+endif
+
+socfpga_g5_hanoff_prepare:
+ @SOCFAMILY="$(SOCFAMILY)"; \
+ if [ -z "$$SOCFAMILY" ]; then \
+ exit 0; \
+ fi; \
+ echo "[INFO] SOC family detected: $$SOCFAMILY";
+ @set -- $$(awk -F'"' ' \
+ /^CONFIG_SYS_VENDOR=/ {v=$$2} \
+ /^CONFIG_SYS_BOARD=/ {b=$$2} \
+ END {print v, b}' .config); \
+ VENDOR=$$1; \
+ BOARD=$$2; \
+ if [ -z "$$VENDOR" ] || [ -z "$$BOARD" ]; then \
+ exit 0; \
+ fi; \
+ BOARD_DIR=$(src)/board/$$VENDOR/$$BOARD; \
+ if [ "$$HANDOFF_PATH" ]; then \
+ echo "[INFO] Using manually specified handoff folder: $$HANDOFF_PATH"; \
+ else \
+ HANDOFF_BASE=$$BOARD_DIR/hps_isw_handoff; \
+ if [ ! -d "$$HANDOFF_BASE" ]; then \
+ exit 0; \
+ fi; \
+ HANDOFF_PATH=$$(ls -d "$$HANDOFF_BASE"/*/ 2>/dev/null | head -n1); \
+ if [ -z "$$HANDOFF_PATH" ]; then \
+ exit 0; \
+ fi; \
+ echo "[INFO] Auto-detected handoff folder: $$HANDOFF_PATH"; \
+ fi; \
+ HIOF_FILE=$$HANDOFF_PATH/$$(basename $$HANDOFF_PATH).hiof; \
+ if [ ! -f "$$HIOF_FILE" ]; then \
+ echo "[WARN] No .hiof file found in $$HANDOFF_PATH, skipping BSP generation."; \
+ exit 0; \
+ fi; \
+ echo "[INFO] Found hiof file: $$HIOF_FILE"; \
+ echo "[INFO] Running BSP generator..."; \
+ python3 $(src)/tools/cv_bsp_generator/cv_bsp_generator.py -i "$$HANDOFF_PATH" -o "$$BOARD_DIR/qts" || echo "[WARN] BSP generator failed, continuing..."; \
+ echo "[DONE] SoCFPGA QTS handoff conversion complete."
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-04 22:30 [PATCH v7] Add optimized Makefile support for SoCFPGA handoff Brian Sune
@ 2025-11-18 14:05 ` Sune Brian
2025-11-19 10:54 ` Chee, Tien Fong
1 sibling, 0 replies; 8+ messages in thread
From: Sune Brian @ 2025-11-18 14:05 UTC (permalink / raw)
To: Tom Rini, u-boot, Chee, Tien Fong
> Add optimized Makefile support for SoCFPGA handoff
>
> - Introduce socfpga_g5_hanoff_prepare target in U-Boot
> arch/arm/mach-socfpga/config.mk
> - Users can convert the handoff via make prepare.
> - Detects Altera/Intel SoCFPGA boards from .config
> - Combines vendor/board extraction into a single shell call
> - Checks for hps_isw_handoff folder and .hiof files
> - Uses ls -d instead of find for faster folder detection
> - Runs BSP generator script only if files exist
> - Non-blocking: continues if handoff folder or files are missing
> - HANDOFF_PATH user define allows overriding auto-detected folder
> - Minimizes subshells and other slow constructs for faster CI
Any trouble on this new compile flow?
Brian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-04 22:30 [PATCH v7] Add optimized Makefile support for SoCFPGA handoff Brian Sune
2025-11-18 14:05 ` Sune Brian
@ 2025-11-19 10:54 ` Chee, Tien Fong
2025-11-19 11:13 ` Sune Brian
2025-11-19 13:08 ` Sune Brian
1 sibling, 2 replies; 8+ messages in thread
From: Chee, Tien Fong @ 2025-11-19 10:54 UTC (permalink / raw)
To: Brian Sune, Tom Rini, u-boot
Hi Brian,
On 5/11/2025 6:30 am, Brian Sune wrote:
> Add optimized Makefile support for SoCFPGA handoff
>
> - Introduce socfpga_g5_hanoff_prepare target in U-Boot
> arch/arm/mach-socfpga/config.mk
> - Users can convert the handoff via make prepare.
> - Detects Altera/Intel SoCFPGA boards from .config
> - Combines vendor/board extraction into a single shell call
> - Checks for hps_isw_handoff folder and .hiof files
> - Uses ls -d instead of find for faster folder detection
> - Runs BSP generator script only if files exist
> - Non-blocking: continues if handoff folder or files are missing
> - HANDOFF_PATH user define allows overriding auto-detected folder
> - Minimizes subshells and other slow constructs for faster CI
>
> Signed-off-by: Brian Sune<briansune@gmail.com>
> ---
> arch/arm/mach-socfpga/config.mk | 50 +++++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
> create mode 100644 arch/arm/mach-socfpga/config.mk
>
> diff --git a/arch/arm/mach-socfpga/config.mk b/arch/arm/mach-socfpga/config.mk
> new file mode 100644
> index 00000000000..df1eb909129
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/config.mk
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Brian Sune<briansune@gmail.com>
> +
> +ifeq ($(CONFIG_TARGET_SOCFPGA_CYCLONE5),y)
> +archprepare: socfpga_g5_hanoff_prepare
Typo: socfpga_g5_hanoff_prepar, it should be socfpga_g5_handoff_prepare
> +else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA5),y)
> +archprepare: socfpga_g5_hanoff_prepare
> +else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA10),y)
You are binding the rule to:
Cyclone V
Arria V
Arria 10
However, cv_bsp_generator.py applies only to Cyclone V and Arria V.
Arria 10 does not use |.hiof| and does**not**use the CV BSP generator.
So this part should /not/ include Arria 10
> +archprepare: socfpga_g5_hanoff_prepare
> +endif
> +
> +socfpga_g5_hanoff_prepare:
> + @SOCFAMILY="$(SOCFAMILY)"; \
> + if [ -z "$$SOCFAMILY" ]; then \
> + exit 0; \
> + fi; \
> + echo "[INFO] SOC family detected: $$SOCFAMILY";
> + @set -- $$(awk -F'"' ' \
> + /^CONFIG_SYS_VENDOR=/ {v=$$2} \
> + /^CONFIG_SYS_BOARD=/ {b=$$2} \
> + END {print v, b}' .config); \
> + VENDOR=$$1; \
> + BOARD=$$2; \
> + if [ -z "$$VENDOR" ] || [ -z "$$BOARD" ]; then \
> + exit 0; \
> + fi; \
> + BOARD_DIR=$(src)/board/$$VENDOR/$$BOARD; \
> + if [ "$$HANDOFF_PATH" ]; then \
> + echo "[INFO] Using manually specified handoff folder: $$HANDOFF_PATH"; \
> + else \
> + HANDOFF_BASE=$$BOARD_DIR/hps_isw_handoff; \
> + if [ ! -d "$$HANDOFF_BASE" ]; then \
> + exit 0; \
> + fi; \
> + HANDOFF_PATH=$$(ls -d "$$HANDOFF_BASE"/*/ 2>/dev/null | head -n1); \
> + if [ -z "$$HANDOFF_PATH" ]; then \
> + exit 0; \
> + fi; \
> + echo "[INFO] Auto-detected handoff folder: $$HANDOFF_PATH"; \
> + fi; \
> + HIOF_FILE=$$HANDOFF_PATH/$$(basename $$HANDOFF_PATH).hiof; \
> + if [ ! -f "$$HIOF_FILE" ]; then \
> + echo "[WARN] No .hiof file found in $$HANDOFF_PATH, skipping BSP generation."; \
> + exit 0; \
> + fi; \
> + echo "[INFO] Found hiof file: $$HIOF_FILE"; \
> + echo "[INFO] Running BSP generator..."; \
> + python3 $(src)/tools/cv_bsp_generator/cv_bsp_generator.py -i "$$HANDOFF_PATH" -o "$$BOARD_DIR/qts" || echo "[WARN] BSP generator failed, continuing..."; \
Arria 10 boards require the A10-specific filter script under:
arch/arm/mach-socfpga/qts-filter-a10.sh
Invocation pattern: qts-filter-a10.sh <handoff-input-directory>
<output-qts-dir>
It processes a set of A10-specific XML and RBF inputs such as:
pinmux.xml
arria10_hps.xml
pll.xml
emif.xml
core.rbf
other Qsys-exported XML files
Because of this, the .hiof detection logic you added will always fail on
Arria 10, and the QTS conversion will silently be skipped.
> + echo "[DONE] SoCFPGA QTS handoff conversion complete."
Thanks.
Tien Fong
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-19 10:54 ` Chee, Tien Fong
@ 2025-11-19 11:13 ` Sune Brian
2025-11-19 13:08 ` Sune Brian
1 sibling, 0 replies; 8+ messages in thread
From: Sune Brian @ 2025-11-19 11:13 UTC (permalink / raw)
To: Chee, Tien Fong; +Cc: Tom Rini, u-boot
typo aligned on both so it wont be an issue from first place.
However indeed should be fixed to let user readable.
Remove: else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA10),y)
is enough meanwhile when users don't place any folder or path
parameter it will simply bypassed.
Brian
> +ifeq ($(CONFIG_TARGET_SOCFPGA_CYCLONE5),y)
> +archprepare: socfpga_g5_hanoff_prepare
>
>
> Typo: socfpga_g5_hanoff_prepar, it should be socfpga_g5_handoff_prepare
>
>
> +else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA5),y)
> +archprepare: socfpga_g5_hanoff_prepare
> +else ifeq ($(CONFIG_TARGET_SOCFPGA_ARRIA10),y)
>
>
> You are binding the rule to:
> Cyclone V
> Arria V
> Arria 10
>
> However, cv_bsp_generator.py applies only to Cyclone V and Arria V.
> Arria 10 does not use .hiof and does not use the CV BSP generator.
>
> So this part should not include Arria 10
>
>
> +archprepare: socfpga_g5_hanoff_prepare
> +endif
> +
> +socfpga_g5_hanoff_prepare:
> + @SOCFAMILY="$(SOCFAMILY)"; \
> + if [ -z "$$SOCFAMILY" ]; then \
> + exit 0; \
> + fi; \
> + echo "[INFO] SOC family detected: $$SOCFAMILY";
> + @set -- $$(awk -F'"' ' \
> + /^CONFIG_SYS_VENDOR=/ {v=$$2} \
> + /^CONFIG_SYS_BOARD=/ {b=$$2} \
> + END {print v, b}' .config); \
> + VENDOR=$$1; \
> + BOARD=$$2; \
> + if [ -z "$$VENDOR" ] || [ -z "$$BOARD" ]; then \
> + exit 0; \
> + fi; \
> + BOARD_DIR=$(src)/board/$$VENDOR/$$BOARD; \
> + if [ "$$HANDOFF_PATH" ]; then \
> + echo "[INFO] Using manually specified handoff folder: $$HANDOFF_PATH"; \
> + else \
> + HANDOFF_BASE=$$BOARD_DIR/hps_isw_handoff; \
> + if [ ! -d "$$HANDOFF_BASE" ]; then \
> + exit 0; \
> + fi; \
> + HANDOFF_PATH=$$(ls -d "$$HANDOFF_BASE"/*/ 2>/dev/null | head -n1); \
> + if [ -z "$$HANDOFF_PATH" ]; then \
> + exit 0; \
> + fi; \
> + echo "[INFO] Auto-detected handoff folder: $$HANDOFF_PATH"; \
> + fi; \
> + HIOF_FILE=$$HANDOFF_PATH/$$(basename $$HANDOFF_PATH).hiof; \
> + if [ ! -f "$$HIOF_FILE" ]; then \
> + echo "[WARN] No .hiof file found in $$HANDOFF_PATH, skipping BSP generation."; \
> + exit 0; \
> + fi; \
> + echo "[INFO] Found hiof file: $$HIOF_FILE"; \
> + echo "[INFO] Running BSP generator..."; \
> + python3 $(src)/tools/cv_bsp_generator/cv_bsp_generator.py -i "$$HANDOFF_PATH" -o "$$BOARD_DIR/qts" || echo "[WARN] BSP generator failed, continuing..."; \
>
>
> Arria 10 boards require the A10-specific filter script under: arch/arm/mach-socfpga/qts-filter-a10.sh
>
> Invocation pattern: qts-filter-a10.sh <handoff-input-directory> <output-qts-dir>
>
> It processes a set of A10-specific XML and RBF inputs such as:
>
> pinmux.xml
> arria10_hps.xml
> pll.xml
> emif.xml
> core.rbf
> other Qsys-exported XML files
>
> Because of this, the .hiof detection logic you added will always fail on Arria 10, and the QTS conversion will silently be skipped.
>
>
> + echo "[DONE] SoCFPGA QTS handoff conversion complete."
>
>
> Thanks.
>
> Tien Fong
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-19 10:54 ` Chee, Tien Fong
2025-11-19 11:13 ` Sune Brian
@ 2025-11-19 13:08 ` Sune Brian
2025-11-20 9:17 ` Chee, Tien Fong
1 sibling, 1 reply; 8+ messages in thread
From: Sune Brian @ 2025-11-19 13:08 UTC (permalink / raw)
To: Chee, Tien Fong; +Cc: Tom Rini, u-boot
> Arria 10 boards require the A10-specific filter script under: arch/arm/mach-socfpga/qts-filter-a10.sh
>
> Invocation pattern: qts-filter-a10.sh <handoff-input-directory> <output-qts-dir>
>
> It processes a set of A10-specific XML and RBF inputs such as:
>
> pinmux.xml
> arria10_hps.xml
> pll.xml
> emif.xml
> core.rbf
> other Qsys-exported XML files
I had provided new patch and removed the A10.
Second because this is bash script and according to
what the new tools are supposed to look like.
Python script is new tools language and should be
followed accordingly.
As such I will not going to merge A10 to this build flow.
And any new family handoff should also put to
the same location as Tom suggestion and also
make things more clean and better on manage.
u-boot/tools/a10_bsp_generator.
Meantime, I think it is even better on generalizing
one folder for all Altera socfpga tools, with
requirements.txt as well.
Brian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-19 13:08 ` Sune Brian
@ 2025-11-20 9:17 ` Chee, Tien Fong
2025-11-20 15:31 ` Sune Brian
0 siblings, 1 reply; 8+ messages in thread
From: Chee, Tien Fong @ 2025-11-20 9:17 UTC (permalink / raw)
To: Sune Brian; +Cc: Tom Rini, u-boot
Hi Brian,
On 19/11/2025 9:08 pm, Sune Brian wrote:
> [CAUTION: This email is from outside your organization. Unless you trust the sender, do not click on links or open attachments as it may be a fraudulent email attempting to steal your information and/or compromise your computer.]
>
>> Arria 10 boards require the A10-specific filter script under: arch/arm/mach-socfpga/qts-filter-a10.sh
>>
>> Invocation pattern: qts-filter-a10.sh <handoff-input-directory> <output-qts-dir>
>>
>> It processes a set of A10-specific XML and RBF inputs such as:
>>
>> pinmux.xml
>> arria10_hps.xml
>> pll.xml
>> emif.xml
>> core.rbf
>> other Qsys-exported XML files
> I had provided new patch and removed the A10.
>
> Second because this is bash script and according to
> what the new tools are supposed to look like.
> Python script is new tools language and should be
> followed accordingly.
>
> As such I will not going to merge A10 to this build flow.
> And any new family handoff should also put to
> the same location as Tom suggestion and also
> make things more clean and better on manage.
> u-boot/tools/a10_bsp_generator.
>
> Meantime, I think it is even better on generalizing
> one folder for all Altera socfpga tools, with
> requirements.txt as well.
Thanks for the clarification.
Understood on the removal of Arria 10 from this flow, since its handoff
mechanism is different and not based on the |.hiof| format.
Noted on your point about keeping the tooling consistent. We can keep
this in mind during future clean-ups.
All good from my side. Thanks for the update.
Tien Fong
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-20 9:17 ` Chee, Tien Fong
@ 2025-11-20 15:31 ` Sune Brian
2025-11-21 10:12 ` Chee, Tien Fong
0 siblings, 1 reply; 8+ messages in thread
From: Sune Brian @ 2025-11-20 15:31 UTC (permalink / raw)
To: Chee, Tien Fong; +Cc: Tom Rini, u-boot
> Thanks for the clarification.
>
> Understood on the removal of Arria 10 from this flow, since its handoff mechanism is different and not based on the .hiof format.
>
> Noted on your point about keeping the tooling consistent. We can keep this in mind during future clean-ups.
>
> All good from my side. Thanks for the update.
>
> Tien Fong
Hi T.F.
Can try to convert to python script but don't have actual A10
on hand. So may be a test folder with generated outputs
to diff the new script for sanity check.
Brian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7] Add optimized Makefile support for SoCFPGA handoff
2025-11-20 15:31 ` Sune Brian
@ 2025-11-21 10:12 ` Chee, Tien Fong
0 siblings, 0 replies; 8+ messages in thread
From: Chee, Tien Fong @ 2025-11-21 10:12 UTC (permalink / raw)
To: Sune Brian; +Cc: Tom Rini, u-boot
Hi Brian,
On 20/11/2025 11:31 pm, Sune Brian wrote:
> [CAUTION: This email is from outside your organization. Unless you trust the sender, do not click on links or open attachments as it may be a fraudulent email attempting to steal your information and/or compromise your computer.]
>
>> Thanks for the clarification.
>>
>> Understood on the removal of Arria 10 from this flow, since its handoff mechanism is different and not based on the .hiof format.
>>
>> Noted on your point about keeping the tooling consistent. We can keep this in mind during future clean-ups.
>>
>> All good from my side. Thanks for the update.
>>
>> Tien Fong
> Hi T.F.
>
> Can try to convert to python script but don't have actual A10
> on hand. So may be a test folder with generated outputs
> to diff the new script for sanity check.
I don’t have any Arria 10 handoff samples or generated QTS output on my
side either, so I’m unable to supply a test folder for diff-checking.
If there is any reference handoff or sample output provided in the
future, we can help review or sanity-check, but for now it’s fine to
leave the A10 part as-is.
Thanks,
Tien Fong
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-11-21 10:12 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2025-11-04 22:30 [PATCH v7] Add optimized Makefile support for SoCFPGA handoff Brian Sune
2025-11-18 14:05 ` Sune Brian
2025-11-19 10:54 ` Chee, Tien Fong
2025-11-19 11:13 ` Sune Brian
2025-11-19 13:08 ` Sune Brian
2025-11-20 9:17 ` Chee, Tien Fong
2025-11-20 15:31 ` Sune Brian
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