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[189.203.103.235]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7cc667563ffsm28460582a34.13.2026.01.02.06.43.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Jan 2026 06:43:12 -0800 (PST) Date: Fri, 2 Jan 2026 08:43:10 -0600 From: Tom Rini To: Beleswar Padhi Cc: afd@ti.com, bb@ti.com, anshuld@ti.com, hnagalla@ti.com, jm@ti.com, nm@ti.com, n-francis@ti.com, u-kumar1@ti.com, u-boot@lists.denx.de Subject: Re: [PATCH v3 00/11] Add support to boot TI K3 HSM M4 core Message-ID: <20260102144310.GA6124@bill-the-cat> References: <20251231173621.1069988-1-b-padhi@ti.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="24w5qNLmg5M0Uto1" Content-Disposition: inline In-Reply-To: <20251231173621.1069988-1-b-padhi@ti.com> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean --24w5qNLmg5M0Uto1 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Dec 31, 2025 at 11:06:10PM +0530, Beleswar Padhi wrote: > Some TI K3 SoCs like J721S2, J784S4, and J722S have a HSM (High Security > Module) M4F core in the Wakeup Voltage Domain which could be used to > run secure services like Authentication. Boot flow for HSM M4 core is > different than the general purpose M4F cores, and is as below: >=20 > 1. Request control of HSM M4F remote processor. > 2. Assert Reset on the HSM M4F remote processor. > 3. Request Secure Entity to Authenticate and Load HSM firmware into > core's internal SRAM memory region. For GP device, load the firmware > manually into core's SRAM region. > 4. Deassert Reset on the HSM M4F remote processor. > 5. Release control of HSM M4F remote processor. >=20 > This series adds support to boot HSM M4 core from R5 SPL stage. The HSM > firmware is packed inside the tispl.bin fit image. The firmware is > unpacked into a temporary DDR address which is then used to load HSM > core. The configs to boot HSM M4 core are disabled by default. >=20 > Note: > This series is dependent on the device-tree changes series posted to > Kernel mailing list: > https://lore.kernel.org/all/20251231165102.950644-1-b-padhi@ti.com/ I see there's already feedback there and I expect at least a v2, so I'm going to mark this series as RFC. As I expect you'll have to change this, please wait to do v4 until the dts portion is in linux-next. I'll look over this series itself now for high level things, and leave it to TI folks to poke at any specific details, thanks. --=20 Tom --24w5qNLmg5M0Uto1 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTzzqh0PWDgGS+bTHor4qD1Cr/kCgUCaVfZegAKCRAr4qD1Cr/k ChF5AQCPglEVDlRcZeRQLB0t/QldLqz+tMbcKyZZN8DAgL9G7QEAxKSXIrEJ/1r+ dsJSOscZZiYOnsMaWJh/nXl7q0Sseg8= =/0ow -----END PGP SIGNATURE----- --24w5qNLmg5M0Uto1--