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From: Sean Anderson <sean.anderson@linux.dev>
To: Tom Rini <trini@konsulko.com>, Adam Ford <aford173@gmail.com>,
	u-boot@lists.denx.de
Cc: Andrew Goodbody <andrew.goodbody@linaro.org>,
	Lukasz Majewski <lukma@denx.de>,
	Sean Anderson <sean.anderson@linux.dev>
Subject: [PATCH] clk: versaclock: Add separate config for SPL
Date: Tue,  6 Jan 2026 15:05:06 -0500	[thread overview]
Message-ID: <20260106200506.679762-1-sean.anderson@linux.dev> (raw)

The versaclock driver operates on an external clock configured via I2C.
The provided clocks may not be necessary in SPL, and SPL_CCF also
increases the binary size. Add a separate configuration option to allow
enabling versaclock only in U-Boot proper.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

 drivers/clk/Kconfig  | 7 +++++++
 drivers/clk/Makefile | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 85cc472b4cb..e1c0aa74f90 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -222,6 +222,13 @@ config CLK_VERSACLOCK
 	  This driver supports the IDT VersaClock 5 and VersaClock 6
 	  programmable clock generators.
 
+config SPL_CLK_VERSACLOCK
+	tristate "Enable VersaClock 5/6 devices in SPL"
+	default CLK_VERSACLOCK
+	depends on SPL_CLK
+	depends on SPL_CLK_CCF
+	depends on SPL_OF_CONTROL
+
 config CLK_VERSAL
 	bool "Enable clock driver support for Versal"
 	depends on (ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 5f0c0d8a5c2..7077efe9bb4 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -50,7 +50,7 @@ obj-$(CONFIG_CLK_SIFIVE) += sifive/
 obj-$(CONFIG_CLK_SOPHGO) += sophgo/
 obj-$(CONFIG_CLK_SUNXI) += sunxi/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
-obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
+obj-$(CONFIG_$(PHASE_)CLK_VERSACLOCK) += clk_versaclock.o
 obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
 obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
 obj-$(CONFIG_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
-- 
2.35.1.1320.gc452695387.dirty

base-commit: 6cdd7597a2fbfc1572c1b0af23d3daf1cefa2de7
branch: versaclk_spl

                 reply	other threads:[~2026-01-06 20:05 UTC|newest]

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