[PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[Michael Trimarchi]

This series addresses two significant issues in the pfuze100 regulator driver
regarding voltage calculation accuracy.

The first patch fixes the handling of the "high range" bit. PFUZE chips support
two voltage ranges (controlled by a register bit) with different step sizes
and base voltages. Previously, the driver assumed the low range, leading to
incorrect voltage settings on boards configured for the high range.

The second patch corrects the interpretation of min_uV. The driver was
incorrectly using the device tree's regulator-min-microvolt constraint as the
mathematical base (zero-index) for voltage calculations. This caused offset
errors whenever the DTS constraint differed from the hardware's absolute minimum.
The patch introduces physical minimums in the driver descriptors to ensure
calculations are based on the datasheet specifications, treating the DTS value
strictly as a safety constraint.

Together, these changes align the U-Boot driver logic with the Linux kernel
implementation and ensure correct voltage output.

Michael Trimarchi (2):
  power: regulator: pfuze100: support high voltage range bit
  power: regulator: pfuze100: Decouple hardware base voltage from DTS
    constraints

 drivers/power/regulator/pfuze100.c | 138 ++++++++++++++++++-----------
 1 file changed, 88 insertions(+), 50 deletions(-)

-- 
2.51.0

[PATCH V2 1/2] power: regulator: pfuze100: support high voltage range bit

[Michael Trimarchi]

The PFUZE100/200/3000 family of PMICs allow switching regulators (specifically
SW2, SW3A/B, SW4 on PFUZE100/200 and SW2 on PFUZE3000) to operate in a
"high" voltage range mode. This mode is indicated by a specific bit in the
voltage selection register (bit 3 for PFUZE3000, bit 6 for others).

When this bit is set:
- PFUZE100/200 switches from a 25mV step to a 50mV step, with a different
  minimum voltage (800mV).
- PFUZE3000 SW2 switches to a completely different non-linear voltage table.

Currently, the driver uses static descriptors that assume the low/default
range. This results in incorrect voltage readings and settings if the
PMIC is configured for the high range.

This patch updates the driver to:
1. Identify regulators with high-bit support via a new `hi_bit` flag.
2. Read the register during probe to detect the current range configuration.
3. Dynamically update the regulator descriptor (step, mask, min_uV, or table)
   to match the active range.

This aligns the U-Boot driver behavior with the Linux kernel implementation.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
V1->V2:
	drop change of uv_mask, it's already fixed for bit 6 and anyway
	0x7 was invalid

---
 drivers/power/regulator/pfuze100.c | 65 +++++++++++++++++++++---------
 1 file changed, 47 insertions(+), 18 deletions(-)

diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c
index f864b1d8834..2242bf68f39 100644
--- a/drivers/power/regulator/pfuze100.c
+++ b/drivers/power/regulator/pfuze100.c
@@ -18,6 +18,7 @@
  *
  * @name: Identify name for the regulator.
  * @type: Indicates the regulator type.
+ * @hi_bit: Indicate if support hi voltage range.
  * @uV_step: Voltage increase for each selector.
  * @vsel_reg: Register for adjust regulator voltage for normal.
  * @vsel_mask: Mask bit for setting regulator voltage for normal.
@@ -29,6 +30,7 @@
 struct pfuze100_regulator_desc {
 	char *name;
 	enum regulator_type type;
+	bool hi_bit;
 	unsigned int uV_step;
 	unsigned int vsel_reg;
 	unsigned int vsel_mask;
@@ -54,10 +56,11 @@ struct pfuze100_regulator_plat {
 		.voltage	=	(vol),				\
 	}
 
-#define PFUZE100_SW_REG(_name, base, step)				\
+#define PFUZE100_SW_REG(_name, base, step, hbit)			\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
+		.hi_bit		=	(hbit),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base) + PFUZE100_VOL_OFFSET,	\
 		.vsel_mask	=	0x3F,				\
@@ -65,10 +68,11 @@ struct pfuze100_regulator_plat {
 		.stby_mask	=	0x3F,				\
 	}
 
-#define PFUZE100_SWB_REG(_name, base, mask, step, voltages)		\
+#define PFUZE100_SWB_REG(_name, base, mask, step, voltages, hbit)	\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
+		.hi_bit		=	(hbit),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base),				\
 		.vsel_mask	=	(mask),				\
@@ -155,15 +159,19 @@ static unsigned int pfuze3000_sw2lo[] = {
 	1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000
 };
 
+static unsigned int pfuze3000_sw2hi[] = {
+	2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
+};
+
 /* PFUZE100 */
 static struct pfuze100_regulator_desc pfuze100_regulators[] = {
-	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000),
-	PFUZE100_SW_REG(sw1c, PFUZE100_SW1CVOL, 25000),
-	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000),
-	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000),
-	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000),
-	PFUZE100_SW_REG(sw4, PFUZE100_SW4VOL, 25000),
-	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst),
+	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000, false),
+	PFUZE100_SW_REG(sw1c, PFUZE100_SW1CVOL, 25000, false),
+	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000, true),
+	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000, true),
+	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000, true),
+	PFUZE100_SW_REG(sw4, PFUZE100_SW4VOL, 25000, true),
+	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
 	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 50000),
@@ -176,11 +184,11 @@ static struct pfuze100_regulator_desc pfuze100_regulators[] = {
 
 /* PFUZE200 */
 static struct pfuze100_regulator_desc pfuze200_regulators[] = {
-	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000),
-	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000),
-	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000),
-	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000),
-	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst),
+	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000, false),
+	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000, true),
+	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000, true),
+	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000, true),
+	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
 	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 50000),
@@ -195,9 +203,9 @@ static struct pfuze100_regulator_desc pfuze200_regulators[] = {
 static struct pfuze100_regulator_desc pfuze3000_regulators[] = {
 	PFUZE3000_SW1_REG(sw1a, PFUZE100_SW1ABVOL, 25000),
 	PFUZE3000_SW1_REG(sw1b, PFUZE100_SW1CVOL, 25000),
-	PFUZE100_SWB_REG(sw2, PFUZE100_SW2VOL, 0x7, 50000, pfuze3000_sw2lo),
+	PFUZE100_SWB_REG(sw2, PFUZE100_SW2VOL, 0x7, 50000, pfuze3000_sw2lo, true),
 	PFUZE3000_SW3_REG(sw3, PFUZE100_SW3AVOL, 50000),
-	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst),
+	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze3000_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
 	PFUZE100_VGEN_REG(vldo1, PFUZE100_VGEN1VOL, 100000),
@@ -246,9 +254,10 @@ static int pfuze100_regulator_probe(struct udevice *dev)
 	struct dm_regulator_uclass_plat *uc_pdata;
 	struct pfuze100_regulator_plat *plat = dev_get_plat(dev);
 	struct pfuze100_regulator_desc *desc;
-	int i, size;
+	int i, size, val, sw_hi = 0x40;
+	int version = dev_get_driver_data(dev_get_parent(dev));
 
-	switch (dev_get_driver_data(dev_get_parent(dev))) {
+	switch (version) {
 	case PFUZE100:
 		desc = pfuze100_regulators;
 		size = ARRAY_SIZE(pfuze100_regulators);
@@ -260,6 +269,7 @@ static int pfuze100_regulator_probe(struct udevice *dev)
 	case PFUZE3000:
 		desc = pfuze3000_regulators;
 		size = ARRAY_SIZE(pfuze3000_regulators);
+		sw_hi = 1 << 3;
 		break;
 	default:
 		debug("Unsupported PFUZE\n");
@@ -281,6 +291,25 @@ static int pfuze100_regulator_probe(struct udevice *dev)
 	uc_pdata = dev_get_uclass_plat(dev);
 
 	uc_pdata->type = desc[i].type;
+
+	/* SW2~SW4 high bit check and modify the voltage value table */
+	if (desc[i].hi_bit) {
+		val = pmic_reg_read(dev->parent, desc[i].vsel_reg);
+		if (val < 0) {
+			printf("Fails to read from the register.\n");
+			return -EIO;
+		}
+
+		if (val & sw_hi) {
+			if (version == PFUZE3000) {
+				desc[i].volt_table = pfuze3000_sw2hi;
+			} else {
+				desc[i].uV_step = 50000;
+				uc_pdata->min_uV = 800000;
+			}
+		}
+	}
+
 	if (uc_pdata->type == REGULATOR_TYPE_BUCK) {
 		if (!strcmp(dev->name, "swbst")) {
 			uc_pdata->mode = pfuze_swbst_modes;
-- 
2.51.0

[PATCH V2 2/2] power: regulator: pfuze100: Decouple hardware base voltage from DTS constraints

[Michael Trimarchi]

Currently, the driver uses the device tree property `regulator-min-microvolt`
(accessed via `uc_pdata->min_uV`) as the base voltage for calculating
voltage register values.

However, the device tree property defines the safety constraint (the
minimum voltage allowed for the specific board/consumer), not the physical
minimum voltage the regulator outputs when the selector is at 0.

Using the DTS constraint as the linear base leads to incorrect voltage
calculations if the constraint does not exactly match the hardware's
zero-index voltage. For example, if a regulator physically starts at
700mV but the DTS constrains it to 1000mV, the driver incorrectly calculates
the selector assuming 0 corresponds to 1000mV.

Fix this by:
1. Adding a `min_uV` field to the regulator descriptor to hold the
   true hardware base voltage as defined in the datasheet.
2. Updating the regulator definitions with the correct base voltages
   (aligned with Linux kernel driver definitions).
3. Using the descriptor's hardware minimum for all voltage-to-selector
   calculations, instead of the DTS constraint.
4. Adding a validation check to ensure the DTS constraint is within the
   hardware's possible range.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
V1->V2: no changes

---
 drivers/power/regulator/pfuze100.c | 94 ++++++++++++++++--------------
 1 file changed, 51 insertions(+), 43 deletions(-)

diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c
index 63d39c21bb8..107f036d33f 100644
--- a/drivers/power/regulator/pfuze100.c
+++ b/drivers/power/regulator/pfuze100.c
@@ -32,6 +32,7 @@ struct pfuze100_regulator_desc {
 	enum regulator_type type;
 	bool hi_bit;
 	unsigned int uV_step;
+	unsigned int min_uV;
 	unsigned int vsel_reg;
 	unsigned int vsel_mask;
 	unsigned int stby_reg;
@@ -54,13 +55,15 @@ struct pfuze100_regulator_plat {
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_FIXED,		\
 		.voltage	=	(vol),				\
+		.min_uV		=	(vol),				\
 	}
 
-#define PFUZE100_SW_REG(_name, base, step, hbit)			\
+#define PFUZE100_SW_REG(_name, base, min, step, hbit)			\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
 		.hi_bit		=	(hbit),				\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base) + PFUZE100_VOL_OFFSET,	\
 		.vsel_mask	=	0x3F,				\
@@ -88,10 +91,11 @@ struct pfuze100_regulator_plat {
 		.volt_table	=	(voltages),			\
 	}
 
-#define PFUZE100_VGEN_REG(_name, base, step)				\
+#define PFUZE100_VGEN_REG(_name, base, min, step)				\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_LDO,		\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base),				\
 		.vsel_mask	=	0xF,				\
@@ -99,10 +103,11 @@ struct pfuze100_regulator_plat {
 		.stby_mask	=	0x20,				\
 	}
 
-#define PFUZE3000_VCC_REG(_name, base, step)				\
+#define PFUZE3000_VCC_REG(_name, base, min, step)				\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_LDO,		\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base),				\
 		.vsel_mask	=	0x3,				\
@@ -110,10 +115,11 @@ struct pfuze100_regulator_plat {
 		.stby_mask	=	0x20,				\
 }
 
-#define PFUZE3000_SW1_REG(_name, base, step)				\
+#define PFUZE3000_SW1_REG(_name, base, min, step)				\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base) + PFUZE100_VOL_OFFSET,	\
 		.vsel_mask	=	0x1F,				\
@@ -121,10 +127,11 @@ struct pfuze100_regulator_plat {
 		.stby_mask	=	0x1F,				\
 	}
 
-#define PFUZE3000_SW2_REG(_name, base, step)				\
+#define PFUZE3000_SW2_REG(_name, base, min, step)				\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base) + PFUZE100_VOL_OFFSET,	\
 		.vsel_mask	=	0x7,				\
@@ -132,10 +139,11 @@ struct pfuze100_regulator_plat {
 		.stby_mask	=	0x7,				\
 	}
 
-#define PFUZE3000_SW3_REG(_name, base, step)				\
+#define PFUZE3000_SW3_REG(_name, base, min, step)			\
 	{								\
 		.name		=	#_name,				\
 		.type		=	REGULATOR_TYPE_BUCK,		\
+		.min_uV		=	(min),				\
 		.uV_step	=	(step),				\
 		.vsel_reg	=	(base) + PFUZE100_VOL_OFFSET,	\
 		.vsel_mask	=	0xF,				\
@@ -165,55 +173,55 @@ static unsigned int pfuze3000_sw2hi[] = {
 
 /* PFUZE100 */
 static struct pfuze100_regulator_desc pfuze100_regulators[] = {
-	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000, false),
-	PFUZE100_SW_REG(sw1c, PFUZE100_SW1CVOL, 25000, false),
-	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000, true),
-	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000, true),
-	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000, true),
-	PFUZE100_SW_REG(sw4, PFUZE100_SW4VOL, 25000, true),
+	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 300000, 25000, false),
+	PFUZE100_SW_REG(sw1c, PFUZE100_SW1CVOL, 300000, 25000, false),
+	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 400000, 25000, true),
+	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 400000, 25000, true),
+	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 400000, 25000, true),
+	PFUZE100_SW_REG(sw4, PFUZE100_SW4VOL, 400000, 25000, true),
 	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
-	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 50000),
-	PFUZE100_VGEN_REG(vgen2, PFUZE100_VGEN2VOL, 50000),
-	PFUZE100_VGEN_REG(vgen3, PFUZE100_VGEN3VOL, 100000),
-	PFUZE100_VGEN_REG(vgen4, PFUZE100_VGEN4VOL, 100000),
-	PFUZE100_VGEN_REG(vgen5, PFUZE100_VGEN5VOL, 100000),
-	PFUZE100_VGEN_REG(vgen6, PFUZE100_VGEN6VOL, 100000),
+	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 800000, 50000),
+	PFUZE100_VGEN_REG(vgen2, PFUZE100_VGEN2VOL, 800000, 50000),
+	PFUZE100_VGEN_REG(vgen3, PFUZE100_VGEN3VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen4, PFUZE100_VGEN4VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen5, PFUZE100_VGEN5VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen6, PFUZE100_VGEN6VOL, 1800000, 100000),
 };
 
 /* PFUZE200 */
 static struct pfuze100_regulator_desc pfuze200_regulators[] = {
-	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 25000, false),
-	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000, true),
-	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 25000, true),
-	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 25000, true),
+	PFUZE100_SW_REG(sw1ab, PFUZE100_SW1ABVOL, 300000, 25000, false),
+	PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 400000, 25000, true),
+	PFUZE100_SW_REG(sw3a, PFUZE100_SW3AVOL, 400000, 25000, true),
+	PFUZE100_SW_REG(sw3b, PFUZE100_SW3BVOL, 400000, 25000, true),
 	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
-	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 50000),
-	PFUZE100_VGEN_REG(vgen2, PFUZE100_VGEN2VOL, 50000),
-	PFUZE100_VGEN_REG(vgen3, PFUZE100_VGEN3VOL, 100000),
-	PFUZE100_VGEN_REG(vgen4, PFUZE100_VGEN4VOL, 100000),
-	PFUZE100_VGEN_REG(vgen5, PFUZE100_VGEN5VOL, 100000),
-	PFUZE100_VGEN_REG(vgen6, PFUZE100_VGEN6VOL, 100000),
+	PFUZE100_VGEN_REG(vgen1, PFUZE100_VGEN1VOL, 800000, 50000),
+	PFUZE100_VGEN_REG(vgen2, PFUZE100_VGEN2VOL, 800000, 50000),
+	PFUZE100_VGEN_REG(vgen3, PFUZE100_VGEN3VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen4, PFUZE100_VGEN4VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen5, PFUZE100_VGEN5VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vgen6, PFUZE100_VGEN6VOL, 1800000, 100000),
 };
 
 /* PFUZE3000 */
 static struct pfuze100_regulator_desc pfuze3000_regulators[] = {
-	PFUZE3000_SW1_REG(sw1a, PFUZE100_SW1ABVOL, 25000),
-	PFUZE3000_SW1_REG(sw1b, PFUZE100_SW1CVOL, 25000),
+	PFUZE3000_SW1_REG(sw1a, PFUZE100_SW1ABVOL, 700000, 25000),
+	PFUZE3000_SW1_REG(sw1b, PFUZE100_SW1CVOL, 700000, 25000),
 	PFUZE100_SWB_REG(sw2, PFUZE100_SW2VOL, 0x7, 50000, pfuze3000_sw2lo, true),
-	PFUZE3000_SW3_REG(sw3, PFUZE100_SW3AVOL, 50000),
+	PFUZE3000_SW3_REG(sw3, PFUZE100_SW3AVOL, 900000, 50000),
 	PFUZE100_SWB_REG(swbst, PFUZE100_SWBSTCON1, 0x3, 50000, pfuze100_swbst, false),
 	PFUZE100_SNVS_REG(vsnvs, PFUZE100_VSNVSVOL, 0x7, pfuze3000_vsnvs),
 	PFUZE100_FIXED_REG(vrefddr, PFUZE100_VREFDDRCON, 750000),
-	PFUZE100_VGEN_REG(vldo1, PFUZE100_VGEN1VOL, 100000),
-	PFUZE100_VGEN_REG(vldo2, PFUZE100_VGEN2VOL, 50000),
-	PFUZE3000_VCC_REG(vccsd, PFUZE100_VGEN3VOL, 150000),
-	PFUZE3000_VCC_REG(v33, PFUZE100_VGEN4VOL, 150000),
-	PFUZE100_VGEN_REG(vldo3, PFUZE100_VGEN5VOL, 100000),
-	PFUZE100_VGEN_REG(vldo4, PFUZE100_VGEN6VOL, 100000),
+	PFUZE100_VGEN_REG(vldo1, PFUZE100_VGEN1VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vldo2, PFUZE100_VGEN2VOL, 800000, 50000),
+	PFUZE3000_VCC_REG(vccsd, PFUZE100_VGEN3VOL, 2850000, 150000),
+	PFUZE3000_VCC_REG(v33, PFUZE100_VGEN4VOL, 2850000, 150000),
+	PFUZE100_VGEN_REG(vldo3, PFUZE100_VGEN5VOL, 1800000, 100000),
+	PFUZE100_VGEN_REG(vldo4, PFUZE100_VGEN6VOL, 1800000, 100000),
 };
 
 #define MODE(_id, _val, _name) { \
@@ -483,15 +491,15 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV)
 			val &= desc->vsel_mask;
 			*uV = desc->volt_table[val];
 		} else {
-			if (uc_pdata->min_uV < 0) {
-				debug("Need to provide min_uV in dts.\n");
+			if (uc_pdata->min_uV < desc->min_uV) {
+				debug("min_uV in dts can not be below regulator min_uV.\n");
 				return -EINVAL;
 			}
 			val = pmic_reg_read(dev->parent, desc->vsel_reg);
 			if (val < 0)
 				return val;
 			val &= desc->vsel_mask;
-			*uV = uc_pdata->min_uV + (int)val * desc->uV_step;
+			*uV = desc->min_uV + (int)val * desc->uV_step;
 		}
 
 		return 0;
@@ -513,13 +521,13 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV)
 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,
 				       desc->vsel_mask, i);
 	} else {
-		if (uc_pdata->min_uV < 0) {
-			debug("Need to provide min_uV in dts.\n");
+		if (uc_pdata->min_uV < desc->min_uV) {
+			debug("min_uV in dts can not be below regulator min_uV.\n");
 			return -EINVAL;
 		}
 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,
 				       desc->vsel_mask,
-				       (*uV - uc_pdata->min_uV) / desc->uV_step);
+				       (*uV - desc->min_uV) / desc->uV_step);
 	}
 
 	return 0;
-- 
2.51.0

Re: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[Peng Fan]

On Sun, Jan 11, 2026 at 09:23:45AM +0100, Michael Trimarchi wrote:
>This series addresses two significant issues in the pfuze100 regulator driver
>regarding voltage calculation accuracy.
>
>The first patch fixes the handling of the "high range" bit. PFUZE chips support
>two voltage ranges (controlled by a register bit) with different step sizes
>and base voltages. Previously, the driver assumed the low range, leading to
>incorrect voltage settings on boards configured for the high range.
>
>The second patch corrects the interpretation of min_uV. The driver was
>incorrectly using the device tree's regulator-min-microvolt constraint as the
>mathematical base (zero-index) for voltage calculations. This caused offset
>errors whenever the DTS constraint differed from the hardware's absolute minimum.
>The patch introduces physical minimums in the driver descriptors to ensure
>calculations are based on the datasheet specifications, treating the DTS value
>strictly as a safety constraint.
>
>Together, these changes align the U-Boot driver logic with the Linux kernel
>implementation and ensure correct voltage output.
>
>Michael Trimarchi (2):
>  power: regulator: pfuze100: support high voltage range bit
>  power: regulator: pfuze100: Decouple hardware base voltage from DTS
>    constraints
>
Please do not submit three version in one day. That only shows patches
are not developed in good shape.

The changes looks good to me, but I would like to see which platforms
are tested with the patchset before apply.

Thanks,
Peng

Re: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[Michael Nazzareno Trimarchi]

Hi Peng

On Tue, Jan 13, 2026 at 8:44 AM Peng Fan <peng.fan@oss.nxp.com> wrote:
>
> On Sun, Jan 11, 2026 at 09:23:45AM +0100, Michael Trimarchi wrote:
> >This series addresses two significant issues in the pfuze100 regulator driver
> >regarding voltage calculation accuracy.
> >
> >The first patch fixes the handling of the "high range" bit. PFUZE chips support
> >two voltage ranges (controlled by a register bit) with different step sizes
> >and base voltages. Previously, the driver assumed the low range, leading to
> >incorrect voltage settings on boards configured for the high range.
> >
> >The second patch corrects the interpretation of min_uV. The driver was
> >incorrectly using the device tree's regulator-min-microvolt constraint as the
> >mathematical base (zero-index) for voltage calculations. This caused offset
> >errors whenever the DTS constraint differed from the hardware's absolute minimum.
> >The patch introduces physical minimums in the driver descriptors to ensure
> >calculations are based on the datasheet specifications, treating the DTS value
> >strictly as a safety constraint.
> >
> >Together, these changes align the U-Boot driver logic with the Linux kernel
> >implementation and ensure correct voltage output.
> >
> >Michael Trimarchi (2):
> >  power: regulator: pfuze100: support high voltage range bit
> >  power: regulator: pfuze100: Decouple hardware base voltage from DTS
> >    constraints
> >
> Please do not submit three version in one day. That only shows patches
> are not developed in good shape.
>
> The changes looks good to me, but I would like to see which platforms
> are tested with the patchset before apply.
>

I have tested on a new imx6dl design but I can ask Dario to test on
some other imx6 board,
do I need to include it in the next release?
I will send some other patches end of this week

Michael

> Thanks,
> Peng



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

RE: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[Peng Fan]

> Subject: Re: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage
> calculation and support high-range
...
> >
> 
> I have tested on a new imx6dl design but I can ask Dario to test on
> some other imx6 board, do I need to include it in the next release?

Yes, please.

Thanks,
Peng.

> I will send some other patches end of this week
> 
> Michael
> 
> > Thanks,
> > Peng
> 
> 
> 
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael@amarulasolutions.com
> __________________________________
> 
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172
> info@amarulasolutions.com
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F
> www.amarulasolutions.com%2F&data=05%7C02%7Cpeng.fan%40nxp.
> com%7C52c4909ff9ae46eebeed08de5290fcd7%7C686ea1d3bc2b4c6f
> a92cd99c5c301635%7C0%7C0%7C639038979850337961%7CUnknow
> n%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAw
> MCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%
> 7C%7C&sdata=cLzDG9ZHDZWkzkmyhYMK1Z0elWa1fh6A3sQ25Zh98tw
> %3D&reserved=0

Re: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage calculation and support high-range

[Michael Nazzareno Trimarchi]

Hi Fabio

On Tue, Jan 13, 2026 at 1:16 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: Re: [PATCH V2 0/2] power: regulator: pfuze100: Fix voltage
> > calculation and support high-range
> ...
> > >
> >
> > I have tested on a new imx6dl design but I can ask Dario to test on
> > some other imx6 board, do I need to include it in the next release?
>

Can you test this series even on your side?

Michael
> Yes, please.
>
> Thanks,
> Peng.
>
> > I will send some other patches end of this week
> >
> > Michael
> >
> > > Thanks,
> > > Peng
> >
> >
> >
> > --
> > Michael Nazzareno Trimarchi
> > Co-Founder & Chief Executive Officer
> > M. +39 347 913 2170
> > michael@amarulasolutions.com
> > __________________________________
> >
> > Amarula Solutions BV
> > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172
> > info@amarulasolutions.com
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F
> > www.amarulasolutions.com%2F&data=05%7C02%7Cpeng.fan%40nxp.
> > com%7C52c4909ff9ae46eebeed08de5290fcd7%7C686ea1d3bc2b4c6f
> > a92cd99c5c301635%7C0%7C0%7C639038979850337961%7CUnknow
> > n%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAw
> > MCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%
> > 7C%7C&sdata=cLzDG9ZHDZWkzkmyhYMK1Z0elWa1fh6A3sQ25Zh98tw
> > %3D&reserved=0



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com