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From: Conor Dooley <conor@kernel.org>
To: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Tom Rini <trini@konsulko.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	u-boot@lists.denx.de
Subject: Re: [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist
Date: Wed, 25 Feb 2026 17:57:20 +0000	[thread overview]
Message-ID: <20260225-immovable-written-2928e53358ea@spud> (raw)
In-Reply-To: <20260225175229.88858-1-heinrich.schuchardt@canonical.com>

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On Wed, Feb 25, 2026 at 06:52:29PM +0100, Heinrich Schuchardt wrote:
> Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.
> 
> MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
> So we don't need CONFIG_(SPL_)ACLINT either.
> 
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v2:
> 	Describe why ACLINT is not relevant here.

Acked-by: Conor Dooley <conor.dooley@microchip.com>

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      reply	other threads:[~2026-02-25 17:57 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-25 17:52 [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist Heinrich Schuchardt
2026-02-25 17:57 ` Conor Dooley [this message]

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