* [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist
@ 2026-02-25 17:52 Heinrich Schuchardt
2026-02-25 17:57 ` Conor Dooley
0 siblings, 1 reply; 2+ messages in thread
From: Heinrich Schuchardt @ 2026-02-25 17:52 UTC (permalink / raw)
To: Rick Chen, Leo; +Cc: Tom Rini, Conor Dooley, u-boot, Heinrich Schuchardt
Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.
MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
So we don't need CONFIG_(SPL_)ACLINT either.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
v2:
Describe why ACLINT is not relevant here.
---
arch/riscv/cpu/mpfs/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/riscv/cpu/mpfs/Kconfig b/arch/riscv/cpu/mpfs/Kconfig
index bcf1ede818b..8054313d182 100644
--- a/arch/riscv/cpu/mpfs/Kconfig
+++ b/arch/riscv/cpu/mpfs/Kconfig
@@ -6,8 +6,6 @@ config MICROCHIP_MPFS
imply CPU
imply CPU_RISCV
imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
- imply SIFIVE_CLINT if RISCV_MMODE
- imply SPL_SIFIVE_CLINT if SPL_RISCV_MMODE
imply CMD_CPU
imply SPL_CPU
imply SPL_OPENSBI
--
2.51.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist
2026-02-25 17:52 [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist Heinrich Schuchardt
@ 2026-02-25 17:57 ` Conor Dooley
0 siblings, 0 replies; 2+ messages in thread
From: Conor Dooley @ 2026-02-25 17:57 UTC (permalink / raw)
To: Heinrich Schuchardt; +Cc: Rick Chen, Leo, Tom Rini, Conor Dooley, u-boot
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On Wed, Feb 25, 2026 at 06:52:29PM +0100, Heinrich Schuchardt wrote:
> Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.
>
> MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
> So we don't need CONFIG_(SPL_)ACLINT either.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v2:
> Describe why ACLINT is not relevant here.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
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2026-02-25 17:52 [PATCH v2 1/1] riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist Heinrich Schuchardt
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