From: Emanuele Ghidoli <ghidoliemanuele@gmail.com>
To: Francesco Dolcini <francesco.dolcini@toradex.com>,
Tom Rini <trini@konsulko.com>
Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>, u-boot@lists.denx.de
Subject: [PATCH v1 1/2] board: toradex: aquila-am69: refactor memory configuration
Date: Mon, 9 Mar 2026 16:53:07 +0100 [thread overview]
Message-ID: <20260309155342.145432-2-ghidoliemanuele@gmail.com> (raw)
In-Reply-To: <20260309155342.145432-1-ghidoliemanuele@gmail.com>
From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
The memory controller configuration doesn't depend only on the memory
size, so refactor the code to use the memory configuration read from
the HW_CFG pin instead of the memory size.
Additionally, make use of one header file for all the memory
configurations.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
---
board/toradex/aquila-am69/aquila-am69.c | 18 +++++++++++-------
board/toradex/aquila-am69/aquila_ddrs.h | 14 ++++++++++++++
board/toradex/aquila-am69/aquila_ddrs_16GB.h | 11 -----------
board/toradex/aquila-am69/aquila_ddrs_8GB.h | 11 -----------
4 files changed, 25 insertions(+), 29 deletions(-)
create mode 100644 board/toradex/aquila-am69/aquila_ddrs.h
delete mode 100644 board/toradex/aquila-am69/aquila_ddrs_16GB.h
delete mode 100644 board/toradex/aquila-am69/aquila_ddrs_8GB.h
diff --git a/board/toradex/aquila-am69/aquila-am69.c b/board/toradex/aquila-am69/aquila-am69.c
index e0975d5bc6fe..c3df14fc7c96 100644
--- a/board/toradex/aquila-am69/aquila-am69.c
+++ b/board/toradex/aquila-am69/aquila-am69.c
@@ -17,8 +17,7 @@
#include <spl.h>
#include "../common/tdx-common.h"
-#include "aquila_ddrs_16GB.h"
-#include "aquila_ddrs_8GB.h"
+#include "aquila_ddrs.h"
#include "ddrs_patch.h"
#define CTRL_MMR_CFG0_MCU_ADC1_CTRL 0x40F040B4
@@ -27,14 +26,19 @@
#define HW_CFG_MEM_SZ_16GB 0x01
#define HW_CFG_MEM_SZ_8GB 0x02
-#define HW_CFG_MEM_SZ_MASK 0x03
+#define HW_CFG_MEM_CFG_MASK 0x03
DECLARE_GLOBAL_DATA_PTR;
static u8 hw_cfg;
+static u8 aquila_am69_memory_cfg(void)
+{
+ return hw_cfg & HW_CFG_MEM_CFG_MASK;
+}
+
static u64 aquila_am69_memory_size(void)
{
- switch (hw_cfg & HW_CFG_MEM_SZ_MASK) {
+ switch (aquila_am69_memory_cfg()) {
case HW_CFG_MEM_SZ_32GB:
return SZ_32G;
case HW_CFG_MEM_SZ_16GB:
@@ -79,12 +83,12 @@ static void update_ddr_timings(void)
int ret = 0;
void *fdt = (void *)gd->fdt_blob;
- switch (aquila_am69_memory_size()) {
- case SZ_8G:
+ switch (aquila_am69_memory_cfg()) {
+ case HW_CFG_MEM_SZ_8GB:
ret = aquila_am69_fdt_apply_ddr_patch(fdt, aquila_am69_ddrss_patch_8GB,
MULTI_DDR_CFG_INTRLV_SIZE_8GB);
break;
- case SZ_16G:
+ case HW_CFG_MEM_SZ_16GB:
ret = aquila_am69_fdt_apply_ddr_patch(fdt, aquila_am69_ddrss_patch_16GB,
MULTI_DDR_CFG_INTRLV_SIZE_16GB);
break;
diff --git a/board/toradex/aquila-am69/aquila_ddrs.h b/board/toradex/aquila-am69/aquila_ddrs.h
new file mode 100644
index 000000000000..3f6cecf5405f
--- /dev/null
+++ b/board/toradex/aquila-am69/aquila_ddrs.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) Toradex - https://www.toradex.com/
+ */
+#ifndef __AQUILA_DDRS_H
+#define __AQUILA_DDRS_H
+
+#define MULTI_DDR_CFG_INTRLV_SIZE_8GB 9
+#define MULTI_DDR_CFG_INTRLV_SIZE_16GB 11
+
+extern struct ddrss_patch *aquila_am69_ddrss_patch_8GB[4];
+extern struct ddrss_patch *aquila_am69_ddrss_patch_16GB[4];
+
+#endif // __AQUILA_DDRS_H
diff --git a/board/toradex/aquila-am69/aquila_ddrs_16GB.h b/board/toradex/aquila-am69/aquila_ddrs_16GB.h
deleted file mode 100644
index 0740c0ef25cd..000000000000
--- a/board/toradex/aquila-am69/aquila_ddrs_16GB.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2025 Toradex - https://www.toradex.com/
- */
-#ifndef __AQUILA_DDRS_16GB_H
-#define __AQUILA_DDRS_16GB_H
-
-#define MULTI_DDR_CFG_INTRLV_SIZE_16GB 11
-extern struct ddrss_patch *aquila_am69_ddrss_patch_16GB[4];
-
-#endif // __AQUILA_DDRS_16GB_H
diff --git a/board/toradex/aquila-am69/aquila_ddrs_8GB.h b/board/toradex/aquila-am69/aquila_ddrs_8GB.h
deleted file mode 100644
index c82f236d55f5..000000000000
--- a/board/toradex/aquila-am69/aquila_ddrs_8GB.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2025 Toradex - https://www.toradex.com/
- */
-#ifndef __AQUILA_DDRS_8GB_H
-#define __AQUILA_DDRS_8GB_H
-
-#define MULTI_DDR_CFG_INTRLV_SIZE_8GB 9
-extern struct ddrss_patch *aquila_am69_ddrss_patch_8GB[4];
-
-#endif // __AQUILA_DDRS_8GB_H
--
2.43.0
next prev parent reply other threads:[~2026-03-09 15:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-09 15:53 [PATCH v1 0/2] DDR configuration refactor and 16GB dual-rank support Emanuele Ghidoli
2026-03-09 15:53 ` Emanuele Ghidoli [this message]
2026-03-09 15:53 ` [PATCH v1 2/2] board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration Emanuele Ghidoli
2026-03-10 7:51 ` [PATCH v1 0/2] DDR configuration refactor and 16GB dual-rank support Francesco Dolcini
2026-03-23 16:49 ` Tom Rini
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