From: Marek Vasut <marex@nabladev.com>
To: u-boot@lists.denx.de
Cc: Marek Vasut <marex@nabladev.com>,
Fabio Estevam <festevam@gmail.com>, Peng Fan <peng.fan@nxp.com>,
Tom Rini <trini@konsulko.com>,
u-boot@dh-electronics.com
Subject: [PATCH 1/4] arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM
Date: Wed, 1 Apr 2026 23:02:17 +0200 [thread overview]
Message-ID: <20260401210238.60010-1-marex@nabladev.com> (raw)
The inline ECC configuration is identical for 2 GiB DRAM variants
and 4 GiB DRAM variants of the SoM, no matter the rank count. Fold
the ECC configuration directly into spl.c to simplify the upcoming
deduplication. No functional change.
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: u-boot@dh-electronics.com
Cc: u-boot@lists.denx.de
---
board/dhelectronics/dh_imx8mp/lpddr4_timing.h | 4 ---
.../dh_imx8mp/lpddr4_timing_2G_32.c | 14 ----------
.../dh_imx8mp/lpddr4_timing_4G_32.c | 14 ----------
board/dhelectronics/dh_imx8mp/spl.c | 26 +++++++++++++++++++
4 files changed, 26 insertions(+), 32 deletions(-)
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
index c4d51174a33..f8078051f2f 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
@@ -9,10 +9,6 @@
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;
-typedef void (*scrub_func_t)(void);
-extern void dh_imx8mp_dhcom_dram_scrub_16g_x32(void);
-extern void dh_imx8mp_dhcom_dram_scrub_32g_x32(void);
-
u8 dh_get_memcfg(void);
#define DDRC_ECCCFG0_ECC_MODE_MASK 0x7
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
index add7a0bf23b..3cb868311f3 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
@@ -1853,17 +1853,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32 = {
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
.fsp_table = { 3600, 400, 100, },
};
-
-#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
-void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)
-{
- ddrc_inline_ecc_scrub(0x0,0x3ffffff);
- ddrc_inline_ecc_scrub(0x4000000,0x7ffffff);
- ddrc_inline_ecc_scrub(0x8000000,0xbffffff);
- ddrc_inline_ecc_scrub(0xc000000,0xfffffff);
- ddrc_inline_ecc_scrub(0x10000000,0x13ffffff);
- ddrc_inline_ecc_scrub(0x14000000,0x17ffffff);
- ddrc_inline_ecc_scrub(0x18000000,0x1bffffff);
- ddrc_inline_ecc_scrub_end(0x0,0x1fffffff);
-}
-#endif
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
index 41b078f6e9f..3a475076e75 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
@@ -1857,17 +1857,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32 = {
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
.fsp_table = { 3600, 400, 100, },
};
-
-#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
-void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)
-{
- ddrc_inline_ecc_scrub(0x0,0x7ffffff);
- ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
- ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
- ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
- ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
- ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
- ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
- ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
-}
-#endif
diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c
index 727e1ff3774..d8a928639b2 100644
--- a/board/dhelectronics/dh_imx8mp/spl.c
+++ b/board/dhelectronics/dh_imx8mp/spl.c
@@ -139,6 +139,32 @@ static void spl_dram_init(void)
}
#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+static void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)
+{
+ ddrc_inline_ecc_scrub(0x0,0x3ffffff);
+ ddrc_inline_ecc_scrub(0x4000000,0x7ffffff);
+ ddrc_inline_ecc_scrub(0x8000000,0xbffffff);
+ ddrc_inline_ecc_scrub(0xc000000,0xfffffff);
+ ddrc_inline_ecc_scrub(0x10000000,0x13ffffff);
+ ddrc_inline_ecc_scrub(0x14000000,0x17ffffff);
+ ddrc_inline_ecc_scrub(0x18000000,0x1bffffff);
+ ddrc_inline_ecc_scrub_end(0x0,0x1fffffff);
+}
+
+static void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)
+{
+ ddrc_inline_ecc_scrub(0x0,0x7ffffff);
+ ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
+ ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
+ ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
+ ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
+ ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
+ ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
+ ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
+}
+
+typedef void (*scrub_func_t)(void);
+
static const scrub_func_t dram_scrub_fn[8] = {
NULL, /* 512 MiB */
NULL, /* 1024 MiB */
--
2.53.0
next reply other threads:[~2026-04-01 23:25 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-01 21:02 Marek Vasut [this message]
2026-04-01 21:02 ` [PATCH 2/4] arm64: imx8mp: Deduplicate DRAM size tables on DH i.MX8MP DHCOM SoM Marek Vasut
2026-04-01 21:02 ` [PATCH 3/4] arm64: imx8mp: Deduplicate 2G and 4G 2r DRAM timings " Marek Vasut
2026-04-01 21:02 ` [PATCH 4/4] arm64: imx8mp: Add 4G 1r " Marek Vasut
-- strict thread matches above, loose matches on Subject: below --
2026-04-01 19:15 [PATCH 1/4] arm64: imx8mp: Fold inline ECC into spl.c " Marek Vasut
2026-04-03 1:38 ` Fabio Estevam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260401210238.60010-1-marex@nabladev.com \
--to=marex@nabladev.com \
--cc=festevam@gmail.com \
--cc=peng.fan@nxp.com \
--cc=trini@konsulko.com \
--cc=u-boot@dh-electronics.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox