From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7E2B1112242 for ; Wed, 1 Apr 2026 23:25:38 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9B63384113; Thu, 2 Apr 2026 01:24:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=nabladev.com header.i=@nabladev.com header.b="GZdtbzvh"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8F1F580517; Wed, 1 Apr 2026 23:02:48 +0200 (CEST) Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A1BA583CF5 for ; Wed, 1 Apr 2026 23:02:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=marex@nabladev.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id DA150112C72; Wed, 1 Apr 2026 23:02:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1775077366; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=oyFogTgRtUvaDDgj6DDgHY1Ox65CuvP8Dusr5r375o0=; b=GZdtbzvhDEjLbYuJPTfV9MX032fkWiBKLWz8fhWTgiv7y/gEkGKuBrY6cky9qX/YJ4nrMG 1wjrbh0F1u5o7HEXhA+zSUg+Umi1RVNKIAjCmAv3SyFcTLk6e6hk79ZggJpW4myqa8rN3x FwdhJwIl+0djdCiZnQJVJzMdp7pk4Mvf3Q7DaGFgMf8WIMvSb3eSv85JaG3zS8wshDgeXM xkmwtO0CJUr/2sa39XM/wE+uK5QUuAQNvY+9PEQ8iSaKrgWa4RU0yAerDkRV1cghG5Dfpb rB+Nwm59HADBMmG1FnCi+C3rf0U8Ghm4CAAFlrGQFoIgjb1hByznVOCSuw0i+w== From: Marek Vasut To: u-boot@lists.denx.de Cc: Marek Vasut , Fabio Estevam , Peng Fan , Tom Rini , u-boot@dh-electronics.com Subject: [PATCH 2/4] arm64: imx8mp: Deduplicate DRAM size tables on DH i.MX8MP DHCOM SoM Date: Wed, 1 Apr 2026 23:02:18 +0200 Message-ID: <20260401210238.60010-2-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260401210238.60010-1-marex@nabladev.com> References: <20260401210238.60010-1-marex@nabladev.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-Mailman-Approved-At: Thu, 02 Apr 2026 01:24:51 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The DRAM size tables are shared by SPL and U-Boot proper, deduplicate those tables into lpddr4_timing.h . No functional change. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Peng Fan Cc: Tom Rini Cc: u-boot@dh-electronics.com Cc: u-boot@lists.denx.de --- board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c | 3 +-- board/dhelectronics/dh_imx8mp/lpddr4_timing.h | 4 ++++ board/dhelectronics/dh_imx8mp/spl.c | 3 +-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index 3fe98d36f5b..3424be10936 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -28,12 +28,11 @@ int mach_cpu_init(void) int board_phys_sdram_size(phys_size_t *size) { - const u16 memsz[] = { 512, 1024, 1536, 2048, 3072, 4096, 6144, 8192 }; const u8 ecc = readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK; u8 memcfg = dh_get_memcfg(); /* 896 kiB, i.e. 1 MiB without 12.5% reserved for in-band ECC */ - *size = (u64)memsz[memcfg] * (SZ_1M - (ecc ? (SZ_1M / 8) : 0)); + *size = (u64)dh_imx8mp_dhcom_dram_size[memcfg] * (SZ_1M - (ecc ? (SZ_1M / 8) : 0)); return 0; } diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h index f8078051f2f..0f9f47bbe11 100644 --- a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h +++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h @@ -6,6 +6,10 @@ #ifndef __LPDDR4_TIMING_H__ #define __LPDDR4_TIMING_H__ +static const u16 dh_imx8mp_dhcom_dram_size[] = { + 512, 1024, 1536, 2048, 3072, 4096, 6144, 8192 +}; + extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32; extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32; diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c index d8a928639b2..ece790da66a 100644 --- a/board/dhelectronics/dh_imx8mp/spl.c +++ b/board/dhelectronics/dh_imx8mp/spl.c @@ -117,11 +117,10 @@ static struct dram_timing_info *dram_timing_info[8] = { static void spl_dram_init(void) { - const u16 size[] = { 512, 1024, 1536, 2048, 3072, 4096, 6144, 8192 }; u8 memcfg = dh_get_memcfg(); int i; - printf("DDR: %d MiB [0x%x]\n", size[memcfg], memcfg); + printf("DDR: %d MiB [0x%x]\n", dh_imx8mp_dhcom_dram_size[memcfg], memcfg); if (!dram_timing_info[memcfg]) { printf("Unsupported DRAM strapping, trying lowest supported. MEMCFG=0x%x\n", -- 2.53.0