[PATCH v4 04/14] arm: dts: bcm2711-rpi-4-b: add Infineon SLB9670/9672 TPM in U-Boot dtsi

[Aidan Garske <aidan@wolfssl.com>]

From: Aidan <aidan@wolfssl.com>

Add a TPM 2.0 device-tree node on SPI0 CE1 for the Infineon
SLB9670 / SLB9672 TPM HAT.  The pinout matches the standard Linux
tpm-slb9670 overlay, so a board configured for U-Boot with this
addition behaves the same as a Linux kernel using that overlay.

The node is placed in bcm2711-rpi-4-b-u-boot.dtsi (the U-Boot-only
DT augmentation file) rather than in bcm2711-rpi-4-b.dts.  This
keeps the upstream-Linux-derived .dts unchanged, so SystemReady
firmware-provided FDTs and the upstream Linux device tree continue
to match what kernel.org ships - which addresses the concern raised
in v3 review about polluting the Linux DT path.

A spi0 alias is added pointing at the BCM2711 SPI controller, so
that wolfTPM's SPI HAL (which addresses the bus by number) finds
the TPM at bus 0 CS 1.

Signed-off-by: Aidan Garske <aidan@wolfssl.com>
---
 arch/arm/dts/bcm2711-rpi-4-b-u-boot.dtsi | 39 ++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 arch/arm/dts/bcm2711-rpi-4-b-u-boot.dtsi

diff --git a/arch/arm/dts/bcm2711-rpi-4-b-u-boot.dtsi b/arch/arm/dts/bcm2711-rpi-4-b-u-boot.dtsi
new file mode 100644
index 00000000000..11174e62131
--- /dev/null
+++ b/arch/arm/dts/bcm2711-rpi-4-b-u-boot.dtsi
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * U-Boot-only additions for Raspberry Pi 4 Model B
+ *
+ * Adds a TPM 2.0 device tree node on SPI0 CE1 for the Infineon
+ * SLB9670 / SLB9672 TPM HAT (electrically identical pinout to
+ * the Linux tpm-slb9670 overlay).
+ *
+ * The node lives in *-u-boot.dtsi rather than in bcm2711-rpi-4-b.dts
+ * so it is only visible to U-Boot's bundled FDT and never pollutes
+ * the upstream Linux DT or a SystemReady firmware-provided FDT.
+ */
+
+#include "bcm283x-u-boot.dtsi"
+
+/ {
+	aliases {
+		spi0 = &spi;
+	};
+};
+
+&gpio {
+	bootph-all;
+};
+
+&spi {
+	status = "okay";
+	bootph-all;
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_gpio7>;
+
+	/* Infineon SLB9670 / SLB9672 TPM 2.0 on CE1 (GPIO7) */
+	tpm@1 {
+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+		reg = <1>;
+		spi-max-frequency = <32000000>;
+		bootph-all;
+	};
+};
-- 
2.49.0