From: James Hilliard <james.hilliard1@gmail.com>
To: u-boot@lists.denx.de
Cc: James Hilliard <james.hilliard1@gmail.com>,
Dario Binacchi <dario.binacchi@amarulasolutions.com>,
Michael Trimarchi <michael@amarulasolutions.com>,
Tom Rini <trini@konsulko.com>
Subject: [PATCH] mtd: rawnand: add Toshiba TC58NVG1S3H
Date: Tue, 14 Jul 2026 16:18:07 -0600 [thread overview]
Message-ID: <20260714221810.425463-1-james.hilliard1@gmail.com> (raw)
The TC58NVG1S3H is not ONFI-compliant and shares its first two ID
bytes with the generic 256 MiB NAND entry. Add a full-ID entry with
the geometry, ECC requirement and default SDR mode 4 specified by the
datasheet.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
---
drivers/mtd/nand/raw/nand_ids.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 4f46378ffe1..966972beca2 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -32,6 +32,10 @@ struct nand_flash_dev nand_flash_ids[] = {
{ .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
2 },
+ {"TC58NVG1S3H 2G 3.3V 8-bit",
+ { .id = {0x98, 0xda, 0x90, 0x15, 0x76} },
+ SZ_2K, SZ_256, SZ_128K, 0, 5, 128, NAND_ECC_INFO(8, SZ_512),
+ 4 },
{"TC58NVG2S0F 4G 3.3V 8-bit",
{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
--
2.53.0
reply other threads:[~2026-07-14 22:18 UTC|newest]
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