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dmarc=none (p=none dis=none) header.from=oss.qualcomm.com X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256 header.s=qcppdkim1 header.b=NZ+2J+en; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.a=rsa-sha256 header.s=google header.b=KC78cPMR X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Balaji Selvanathan via U-Boot Reply-To: Balaji Selvanathan Errors-To: u-boot-bounces@lists.u-boot-project.org Sender: "U-Boot" When U-Boot is loaded by XBL in Snagboot mode, XBL leaves the MMU enabled with its own page tables. This causes stale TLB entries and incorrect memory mappings when U-Boot initializes its own MMU. Disable the MMU and invalidate TLBs before branching to the reset vector. This ensures a clean MMU state for U-Boot initialization in Snagboot mode. Signed-off-by: Balaji Selvanathan --- Changes iv v5: - Clear C bit (Dcache enable) also during MMU disable Changes iv v4: - Remove handling for EL1 or EL2 entry as for Snagboot we would only enter U-Boot in EL3 from previous bootloader Changes in v3: - Brought the MMU disable logic under CONFIG_QCOM_SNAGBOOT_SUPPORT ifdef condition - Moved the MMU disable codes to a new seperate file Changes in v2: - Newly introduced in v2 --- arch/arm/mach-snapdragon/include/mach/boot0.h | 2 ++ .../mach-snapdragon/include/mach/snagboot_boot0.h | 27 ++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm/mach-snapdragon/include/mach/boot0.h b/arch/arm/mach-snapdragon/include/mach/boot0.h index b3c76d6d97d..a4eb5723d2e 100644 --- a/arch/arm/mach-snapdragon/include/mach/boot0.h +++ b/arch/arm/mach-snapdragon/include/mach/boot0.h @@ -4,6 +4,8 @@ #else #if defined(CONFIG_BOOT0_MSM8916_PSCI_WORKAROUND) #include "msm8916_boot0.h" +#elif defined(CONFIG_QCOM_BOOT0_SNAGBOOT_MODE) +#include "snagboot_boot0.h" #else b reset #endif diff --git a/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h b/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h new file mode 100644 index 00000000000..f82ee87c9b9 --- /dev/null +++ b/arch/arm/mach-snapdragon/include/mach/snagboot_boot0.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Early MMU Disable for Snagboot Mode + * + * Disable MMU at the earliest possible point for EL3 entry. + * Snagboot mode always enters U-Boot at EL3. + * + * After disabling MMU, invalidate TLB to clear any stale entries that might + * cause issues when MMU is re-enabled later. + */ + + mrs x0, CurrentEL + cmp x0, #(3 << 2) /* Verify EL3 entry */ + b.ne reset /* Unexpected: not at EL3 */ + + /* Disable MMU at EL3 */ + mrs x0, sctlr_el3 + bic x0, x0, #1 /* Clear M bit (MMU enable) */ + bic x0, x0, #(1 << 2) /* Clear C bit (Dcache enable) */ + bic x0, x0, #(1 << 19) /* Clear WXN bit (Write XOR Execute) */ + msr sctlr_el3, x0 + isb + /* Invalidate entire TLB for all ELs */ + tlbi alle3 + dsb sy + isb + b reset \ No newline at end of file -- 2.34.1