From: Akshay Belsare <akshay.belsare@amd.com>
To: <u-boot@lists.u-boot-project.org>, <michal.simek@amd.com>
Cc: <git@amd.com>, <padmarao.begari@amd.com>,
Akshay Belsare <akshay.belsare@amd.com>,
Tom Rini <trini@konsulko.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>
Subject: [PATCH 3/3] board: xilinx: decouple PGGS boot index read from firmware
Date: Thu, 20 Aug 2026 20:24:19 +0530 [thread overview]
Message-ID: <20260820145459.246717-4-akshay.belsare@amd.com> (raw)
In-Reply-To: <20260820145459.246717-1-akshay.belsare@amd.com>
Move PGGS boot index retrieval behind a platform-specific helper
instead of selecting between firmware and direct register access in
plat_get_boot_index().
Add weak default implementations for Versal and Versal Gen 2, and cast
the register address to (ulong) before readl() to ensure correct
handling on 64-bit targets.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
---
arch/arm/mach-versal/cpu.c | 5 +++++
arch/arm/mach-versal/include/mach/sys_proto.h | 2 ++
arch/arm/mach-versal2/cpu.c | 5 +++++
arch/arm/mach-versal2/include/mach/sys_proto.h | 2 ++
board/xilinx/common/board.c | 6 ++----
include/zynqmp_firmware.h | 1 -
6 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 15b3303bd1c..a4ee51ef0d6 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -191,6 +191,11 @@ __weak int xilinx_pm_get_chipid(u32 *idcode, u32 *version)
return 0;
}
+__weak u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr)
+{
+ return readl((ulong)reg_addr);
+}
+
U_BOOT_DRVINFO(soc_xilinx_versal) = {
.name = "soc_xilinx_versal",
};
diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h
index bff4659eb8f..771b8cd8cbc 100644
--- a/arch/arm/mach-versal/include/mach/sys_proto.h
+++ b/arch/arm/mach-versal/include/mach/sys_proto.h
@@ -29,5 +29,7 @@ u32 versal_bootmode_reg(void);
void versal_timer_setup(void);
/* Overridable chip ID accessor: weak MMIO default, firmware override */
int xilinx_pm_get_chipid(u32 *idcode, u32 *version);
+/* Overridable PMC GLOBAL PGGS register accessor: weak MMIO default, firmware override */
+u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr);
#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-versal2/cpu.c b/arch/arm/mach-versal2/cpu.c
index 24a02c38462..404250f2d44 100644
--- a/arch/arm/mach-versal2/cpu.c
+++ b/arch/arm/mach-versal2/cpu.c
@@ -338,6 +338,11 @@ __weak u32 zynqmp_pm_get_pmc_tap_usercode(void)
return readl(PMC_TAP_USERCODE);
}
+__weak u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr)
+{
+ return readl((ulong)reg_addr);
+}
+
U_BOOT_DRVINFO(soc_amd_versal2) = {
.name = "soc_amd_versal2",
};
diff --git a/arch/arm/mach-versal2/include/mach/sys_proto.h b/arch/arm/mach-versal2/include/mach/sys_proto.h
index fcc2e75c89a..64626bac24e 100644
--- a/arch/arm/mach-versal2/include/mach/sys_proto.h
+++ b/arch/arm/mach-versal2/include/mach/sys_proto.h
@@ -27,6 +27,8 @@ int xilinx_pm_get_chipid(u32 *idcode, u32 *version);
u32 zynqmp_pm_get_pmc_tap_idcode(void);
u32 zynqmp_pm_get_pmc_tap_version(void);
u32 zynqmp_pm_get_pmc_tap_usercode(void);
+/* Overridable PMC GLOBAL PGGS register accessor: weak MMIO default, firmware override */
+u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr);
int zynqmp_pm_wait_mphy_tx_rx_config_ready(u32 timeout_us);
int zynqmp_pm_wait_sram_init_done(u32 timeout_us);
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index f45b879736e..ac309ae7336 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -21,6 +21,7 @@
#include <asm/sections.h>
#if defined(CONFIG_ARCH_VERSAL) || defined(CONFIG_ARCH_VERSAL2)
#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
#endif
#include <dm/uclass.h>
#include <i2c.h>
@@ -752,10 +753,7 @@ static int plat_get_boot_index(void)
{
u32 val;
- if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE))
- val = zynqmp_pm_get_pmc_global_pggs_reg(PMC_GLOBAL_PGGS4_REG);
- else
- val = readl(PMC_GLOBAL_PGGS4_REG);
+ val = zynqmp_pm_get_pmc_global_pggs_reg(PMC_GLOBAL_PGGS4_REG);
if (FIELD_GET(MAGIC_MASK, val) != MAGIC_NUM) {
log_err("FWU requires PMC magic number 0x%x\n", MAGIC_NUM);
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 0293bd15a2e..a60d33b02ab 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -466,7 +466,6 @@ int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
int zynqmp_pm_feature(const u32 api_id);
u32 zynqmp_pm_get_bootmode_reg(void);
u32 zynqmp_pm_get_pmc_multi_boot_reg(void);
-u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr);
/* Type of Config Object */
#define PM_CONFIG_OBJECT_TYPE_BASE 0x1U
--
2.34.1
prev parent reply other threads:[~2026-08-20 15:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-20 14:54 [PATCH 0/3] soc/board: decouple SoC identification reads from firmware calls Akshay Belsare
2026-08-20 14:54 ` [PATCH 1/3] soc: xilinx: decouple chip ID retrieval from direct " Akshay Belsare
2026-08-20 14:54 ` [PATCH 2/3] soc: xilinx: route PMC TAP register access through firmware Akshay Belsare
2026-08-20 14:54 ` Akshay Belsare [this message]
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