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charset=utf-8 Content-Disposition: inline In-Reply-To: <20260824-pinctrl-v1-0-e02ed7e9309f@riscstar.com> X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Hi Eric, On 16:13 Mon 24 Aug , Eric Chung wrote: > - Add IO power domain control register programming via APBC block with > ASAR unlocking for dual-voltage GPIO banks (3.3V/1.8V switching) > - Fix drive strength configuration: use FIELD_PREP(), preserve io_type, > return correct pin number, and remove redundant initialization > You should mention this is split from previous mmc series I previous have some comments for patch 1 which you missed? also you lost my review tags, or should explain if not applying the tags https://lore.kernel.org/all/20260817021216-GKB566872@kernel.org/ https://lore.kernel.org/all/20260817024807-GKC566872@kernel.org/ > Signed-off-by: Eric Chung > > --- > Eric Chung (2): > pinctrl: k1: fix drive strength configuration > pinctrl: k1: add IO power domain configuration support > > drivers/pinctrl/spacemit/pinctrl-k1.c | 107 +++++++++++++++++++++++++++++++--- > 1 file changed, 100 insertions(+), 7 deletions(-) > --- > base-commit: 6073c36b2c8d39afe3ecc789b281667a3ddebc70 > change-id: 20260824-pinctrl-718fe50eb9f8 > > Best regards, > -- > Eric Chung > -- Yixun Lan (dlan)