From: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
To: Simon Glass <sjg@chromium.org>, Quentin Schulz <u-boot@0leil.net>,
u-boot@lists.u-boot-project.org
Cc: Tom Rini <trini@konsulko.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
Kever Yang <kever.yang@rock-chips.com>,
Lukasz Majewski <lukma@denx.de>,
Anatolij Gustschin <ag.dev.uboot@gmail.com>,
Heiko Schocher <hs@nabladev.com>,
Marek Vasut <marek.vasut+usb@mailbox.org>,
Svyatoslav Ryhel <clamor95@gmail.com>,
Peter Robinson <pbrobinson@gmail.com>,
Levin Du <djw@t-chip.com.cn>,
Suniel Mahesh <sunil@amarulasolutions.com>,
Alexey Charkov <alchark@flipper.net>,
Fabio Estevam <festevam@nabladev.com>,
Jonas Karlman <jonas@kwiboo.se>,
Chris Morgan <macromorgan@hotmail.com>,
Coia Prant <coiaprant@gmail.com>,
Frank Wunderlich <frank-w@public-files.de>,
Andy Yan <andyshrk@163.com>, Liangbin Lian <jjm2473@gmail.com>,
Joseph Chen <chenjh@rock-chips.com>,
Tianling Shen <cnsztl@gmail.com>,
Klaus Goger <klaus.goger@cherry.de>,
Heiko Stuebner <heiko.stuebner@cherry.de>,
Jacobe Zang <jacobe.zang@wesion.com>,
Jiehui He <jiehui.he@foxmail.com>,
John Clark <inindev@gmail.com>,
Sebastian Kropatsch <seb-dev@mail.de>,
Jagan Teki <jagan@edgeble.ai>, Ilya Katsnelson <me@0upti.me>,
Niu Zhihong <zhihong@nzhnb.com>,
Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
Tom Fitzhenry <tom@tom-fitzhenry.me.uk>,
Akash Gajjar <gajjar04akash@gmail.com>,
Maxim Moskalets <maximmosk4@gmail.com>,
FUKAUMI Naoki <naoki@radxa.com>,
Eugen Hristev <ehristev@kernel.org>,
Jianfeng Liu <liujianfeng1994@gmail.com>,
Elon Zhang <zhangzj@rock-chips.com>,
Joshua Riek <jjriek@verizon.net>,
Martin Herren <sputnik@on-the-web.ch>,
Torsten Duwe <duwe@lst.de>,
Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Subject: [PATCH RFC 05/11] arm: rockchip: support DISPLAY_CPUINFO on all Rockchip SoC
Date: Sun, 20 Sep 2026 16:15:49 +0200 [thread overview]
Message-ID: <20260920-reset-v1-5-42820216369f@gmail.com> (raw)
In-Reply-To: <20260920-reset-v1-0-42820216369f@gmail.com>
Move rockchip_get_reset_cause() implementation to SoC-specific source
files, leaving a dummy weak common implementation in cpu-info.c file:
an effective common implementation is not feasible due SoC differences.
BTW the existing ones for RK3568 and RK3588 need to be fixed/improved
because their CRU_GLB_RST_ST registers differ from the one common to
RK3288 and RK3399 on which the implementation is based.
Moreover, now all the Rockchip SoC board configurations can select the
DISPLAY_CPUINFO config option and compile cpu-info.c successfully which
provides print_cpuinfo(). Previously, boards with SoC other than RK3288
RK3399 RK3568 and RK3588 could not have DISPLAY_CPUINFO selected.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
---
arch/arm/mach-rockchip/cpu-info.c | 44 ++----------------------------
arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 35 ++++++++++++++++++++++++
arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 35 ++++++++++++++++++++++++
arch/arm/mach-rockchip/rk3568/clk_rk3568.c | 35 ++++++++++++++++++++++++
arch/arm/mach-rockchip/rk3588/clk_rk3588.c | 35 ++++++++++++++++++++++++
5 files changed, 142 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index 2ec96a20c3d..b6e3d9ff964 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -10,49 +10,9 @@
#include <asm/arch-rockchip/hardware.h>
#include <linux/err.h>
-#if defined(CONFIG_ROCKCHIP_RK3288)
-# include <asm/arch-rockchip/cru_rk3288.h>
-#elif defined(CONFIG_ROCKCHIP_RK3399)
-# include <asm/arch-rockchip/cru_rk3399.h>
-#elif defined(CONFIG_ROCKCHIP_RK3568)
-#include <asm/arch-rockchip/cru_rk3568.h>
-#elif defined(CONFIG_ROCKCHIP_RK3588)
-#include <asm/arch-rockchip/cru_rk3588.h>
-#endif
-
-/* CRU_GLB_RST_ST */
-enum {
- GLB_POR_RST,
- FST_GLB_RST_ST = BIT(0),
- SND_GLB_RST_ST = BIT(1),
- FST_GLB_TSADC_RST_ST = BIT(2),
- SND_GLB_TSADC_RST_ST = BIT(3),
- FST_GLB_WDT_RST_ST = BIT(4),
- SND_GLB_WDT_RST_ST = BIT(5),
-};
-
-enum rockchip_rst_cause rockchip_get_reset_cause(void)
+__weak enum rockchip_rst_cause rockchip_get_reset_cause(void)
{
- struct rockchip_cru *cru = rockchip_get_cru();
-
- if (IS_ERR(cru))
- return RST_CAUSE_UNAVAILABLE;
-
- switch (cru->glb_rst_st) {
- case GLB_POR_RST:
- return RST_CAUSE_POR;
- case FST_GLB_RST_ST:
- case SND_GLB_RST_ST:
- return RST_CAUSE_REG;
- case FST_GLB_TSADC_RST_ST:
- case SND_GLB_TSADC_RST_ST:
- return RST_CAUSE_THERMAL;
- case FST_GLB_WDT_RST_ST:
- case SND_GLB_WDT_RST_ST:
- return RST_CAUSE_WDOG;
- }
-
- return RST_CAUSE_UNKNOWN;
+ return RST_CAUSE_UNAVAILABLE;
}
#if IS_ENABLED(CONFIG_DISPLAY_CPUINFO)
diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
index d725730f5bd..a245d865a0b 100644
--- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
@@ -30,3 +30,38 @@ void *rockchip_get_cru(void)
return priv->cru;
}
+
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST = BIT(2),
+ SND_GLB_TSADC_RST_ST = BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+};
+
+enum rockchip_rst_cause rockchip_get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+
+ if (IS_ERR(cru))
+ return RST_CAUSE_UNAVAILABLE;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ return RST_CAUSE_POR;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ return RST_CAUSE_REG;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ return RST_CAUSE_THERMAL;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ return RST_CAUSE_WDOG;
+ }
+
+ return RST_CAUSE_UNKNOWN;
+}
diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
index 170071d243d..afd57b2e354 100644
--- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
@@ -51,3 +51,38 @@ void *rockchip_get_pmucru(void)
return priv->pmucru;
}
+
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST = BIT(2),
+ SND_GLB_TSADC_RST_ST = BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+};
+
+enum rockchip_rst_cause rockchip_get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+
+ if (IS_ERR(cru))
+ return RST_CAUSE_UNAVAILABLE;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ return RST_CAUSE_POR;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ return RST_CAUSE_REG;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ return RST_CAUSE_THERMAL;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ return RST_CAUSE_WDOG;
+ }
+
+ return RST_CAUSE_UNKNOWN;
+}
diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
index 1c6b2ece602..e10bcef727d 100644
--- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
@@ -50,3 +50,38 @@ void *rockchip_get_pmucru(void)
return priv->pmucru;
}
+
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST = BIT(2),
+ SND_GLB_TSADC_RST_ST = BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+};
+
+enum rockchip_rst_cause rockchip_get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+
+ if (IS_ERR(cru))
+ return RST_CAUSE_UNAVAILABLE;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ return RST_CAUSE_POR;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ return RST_CAUSE_REG;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ return RST_CAUSE_THERMAL;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ return RST_CAUSE_WDOG;
+ }
+
+ return RST_CAUSE_UNKNOWN;
+}
diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
index 250ec423bd2..5698b16db58 100644
--- a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
@@ -29,3 +29,38 @@ void *rockchip_get_cru(void)
return priv->cru;
}
+
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST = BIT(2),
+ SND_GLB_TSADC_RST_ST = BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+};
+
+enum rockchip_rst_cause rockchip_get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+
+ if (IS_ERR(cru))
+ return RST_CAUSE_UNAVAILABLE;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ return RST_CAUSE_POR;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ return RST_CAUSE_REG;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ return RST_CAUSE_THERMAL;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ return RST_CAUSE_WDOG;
+ }
+
+ return RST_CAUSE_UNKNOWN;
+}
--
2.34.1
next prev parent reply other threads:[~2026-09-20 15:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-20 14:15 [PATCH RFC 00/11] rockchip: SoC info and reset cause printouts Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 01/11] arm: rockchip: include SoC-specific CRU header file Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 02/11] rockchip: cru: move code from header to source file Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 03/11] rockchip: cru: remove unnecessary common cru.h file Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 04/11] rockchip: cru: improve and simplify reset cause handling Massimo Pegorer
2026-09-20 14:15 ` Massimo Pegorer [this message]
2026-09-20 14:15 ` [PATCH RFC 06/11] arm: rockchip: unbind cpu-info.c from DISPLAY_CPUINFO Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 07/11] arm: rockchip: print SoC detailed info with DISPLAY_CPUINFO Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 08/11] arm: rockchip: print reset cause only when available Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 09/11] arm: rockchip: do not print SoC info with DISPLAY_BOARDINFO Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 10/11] configs: rockchip: resync Anbernic RG-DS with savedefconfig Massimo Pegorer
2026-09-20 14:15 ` [PATCH RFC 11/11] configs: rockchip: add DISPLAY_CPUINFO to keep SoC info print Massimo Pegorer
2026-09-20 15:49 ` [PATCH RFC 00/11] rockchip: SoC info and reset cause printouts Jonas Karlman
2026-09-21 16:51 ` Massimo Pegorer
2026-09-21 16:58 ` Quentin Schulz
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