From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Date: Thu, 15 Nov 2018 19:28:16 +0100 Subject: [U-Boot] [PATCH v2 2/5] serial: ns16550: Read reg-io-width from device tree In-Reply-To: <20181115175854.7550-3-andriy.shevchenko@linux.intel.com> References: <20181115175854.7550-1-andriy.shevchenko@linux.intel.com> <20181115175854.7550-3-andriy.shevchenko@linux.intel.com> Message-ID: <2089286e-bd80-e487-2a1f-83cbe1db6dcf@suse.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 15.11.18 18:58, Andy Shevchenko wrote: > Cache the value of the reg-io-width property for the future use. > > Signed-off-by: Andy Shevchenko > --- > drivers/serial/ns16550.c | 1 + > include/ns16550.h | 4 +++- > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c > index f9041aa626..b51b56de9f 100644 > --- a/drivers/serial/ns16550.c > +++ b/drivers/serial/ns16550.c > @@ -408,6 +408,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) > > plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); > plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); > + plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); > > err = clk_get_by_index(dev, 0, &clk); > if (!err) { > diff --git a/include/ns16550.h b/include/ns16550.h > index 5fcbcd2e74..22b89e4d6d 100644 > --- a/include/ns16550.h > +++ b/include/ns16550.h > @@ -49,14 +49,16 @@ > * struct ns16550_platdata - information about a NS16550 port > * > * @base: Base register address > + * @reg_width: IO accesses size of registers (in bytes) > * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) > * @clock: UART base clock speed in Hz > */ > struct ns16550_platdata { > unsigned long base; > + int reg_width; > int reg_shift; > - int clock; > int reg_offset; > + int clock; Why move clock? Alex > u32 fcr; > }; > >