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[82.149.19.102]) by smtp.gmail.com with ESMTPSA id b17-20020a50b411000000b00454546561cfsm11976755edh.82.2022.10.12.14.43.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Oct 2022 14:43:22 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Jagan Teki , Andre Przywara Cc: Icenowy Zheng , Jesse Taube , Yifan Gu , Giulio Benetti , George Hilliard , Samuel Holland , u-boot@lists.denx.de, linux-sunxi@lists.linux.dev Subject: Re: [PATCH 5/6] sunxi: f1c100: dtsi: add UART1 pins Date: Wed, 12 Oct 2022 23:43:21 +0200 Message-ID: <2147678.NgBsaNRSFp@kista> In-Reply-To: <20221012163458.1968900-6-andre.przywara@arm.com> References: <20221012163458.1968900-1-andre.przywara@arm.com> <20221012163458.1968900-6-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Andre, Dne sreda, 12. oktober 2022 ob 18:34:57 CEST je Andre Przywara napisal(a): > The F1Cx00 SoCs connect the first PortA pins to UART1. > > Add this to the SoC .dtsi, so boards can reference UART1 pins. > > Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Best regards, Jernej > --- > arch/arm/dts/suniv-f1c100s.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/suniv-f1c100s.dtsi > b/arch/arm/dts/suniv-f1c100s.dtsi index 0edc1724407..bc563c12e95 100644 > --- a/arch/arm/dts/suniv-f1c100s.dtsi > +++ b/arch/arm/dts/suniv-f1c100s.dtsi > @@ -175,6 +175,11 @@ > pins = "PE0", "PE1"; > function = "uart0"; > }; > + > + uart1_pa_pins: uart1-pa-pins { > + pins = "PA2", "PA3"; > + function = "uart1"; > + }; > }; > > timer@1c20c00 { > -- > 2.25.1