[U-Boot-Users] NAND boot from file

[U-Boot-Users] NAND boot from file

[Charles Krinke]

I have been able to perform a nand boot with nand read and write.jffs2
like this:

Write uImage
Uboot> tftp 0x1000000 uImage 
Uboot> nand write.jffs2 0x1000000 0 0x100000

(reboot)

Read uImage & boot from it
Uboot> nand read 0x1000000 0 0x100000
Uboot> bootm 0x1000000

This works fine, but I am trying to understand how to boot from a uImage
previously written on a formatted jffs2 flash by Linux-2.6.17.11 or if
it is possible. 

I see some hints that this may be possible with mtdids, mtdparts, fsinfo
and ls and would like to do something like

Write uImage with Linux using 'cp uImage /mnt/flash'
# flash_eraseall -j /dev/mtd0
# mount -t jffs2 /dev/mtdblock0 /mnt/flash0
# cp uImage /mnt/flash0

(reboot)

Read uImage
Uboot> setenv mtdids nand0=atx-0
Uboot> setenv mtdparts mtdparts=atx-0:16M at 0M(boot)
Uboot> <commandToDetermineImageOffset> <uImageOffset>
Uboot> nboot <uImageOffset>

There are a few issues. One is that I don't know the offset of the
uImage as written by Linux. Another is I don't know if this is the right
recipe or whether I am going in the right direction.

Could you offer a couple of suggestions.

Charles

[U-Boot-Users] NAND boot from file

[Wolfgang Denk]

In message <A590D28B5042C041BCC880094CB6172E33DF3C@mail1irv.inside.istor.com> you wrote:
> 
> Write uImage with Linux using 'cp uImage /mnt/flash'
> # flash_eraseall -j /dev/mtd0
> # mount -t jffs2 /dev/mtdblock0 /mnt/flash0
> # cp uImage /mnt/flash0
> 
> (reboot)
> 
> Read uImage
> Uboot> setenv mtdids nand0=atx-0
> Uboot> setenv mtdparts mtdparts=atx-0:16M at 0M(boot)

OK.

> Uboot> <commandToDetermineImageOffset> <uImageOffset>
> Uboot> nboot <uImageOffset>

Um... if this is JFFS2, then why not simply "fsload" + "bootm" ?

> There are a few issues. One is that I don't know the offset of the
> uImage as written by Linux. Another is I don't know if this is the right
> recipe or whether I am going in the right direction.

JFFS2 is a supported file system, so use file system code to read the
files.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The best things in life are for a fee.

[U-Boot-Users] NAND boot from file

[Charles Krinke]

Dear Wolfgang:

>Um... if this is JFFS2, then why not simply "fsload" + "bootm" ?

Although I can format the flash in Linux and run fsinfo, ls or fsload in
u-boot, there is a time of several minutes after

Scanning JFFS2 FS

Before ls can find the directory or fsload can attempt to load the
uImage file.

I am thinking that the 'flash_eraseall -j' command I am using may not be
quite setup correctly with the u-boot environment. It should not take
several minutes to pull a directory off a formatted flash. Here is what
I do:

Linux# flash_eraseall -j /dev/mtd0
Linux# mount -t jffs2 /dev/mtdblock0 /mnt/flash1
Linux# cp /uImage /mnt/flash1
Linux# ls /mnt/flash1
uImage is here, now reboot

uboot> ls
uImage is here, but it takes several minutes to get the listing. Fsload
takes several minutes also.

Can you think of what other assumptions I may be making that may be
invalid?

Charles

[U-Boot-Users] Help with TSEC on MPC8343

[Johnson, Justin M]

I ported U-Boot 1.1.6 to a custom board I am having trouble getting the TSECs to work.  I am using an MPC8343 with the reduced interface, and a National Semiconductor DP83848 PHY.  When I do a ping, I get the following result:

=> ping 192.168.0.100
Trying TSEC0
Speed: 100, full duplex
Using TSEC0 device
TSEC0: tsec: tx error
TSEC0: tsec: tx buffers full
ping failed; host 192.168.0 is not alive
=>

When I try with the Freescale evaluation board running U-Boot 1.1.3, it works, so I am fairly confident of the network IP addresses, etc.

=> ping 192.168.0.100
Speed: 100, full duplex
Using Freescale TSEC0 device
host 192.168.0.100 is alive
=>

I am new to all of this and an not sure what I am forgetting to set up.  My board's config file is based on the MPC8349ADS.h file.  I have read the README file and searched the mailing list, but haven't found (or completely missed) what I need.  Below are some register values at the time the Tx Error occurred.  Any help will be greatly appreciated. 



***General Control and Status Registers (0x2_n000)
Interrupt Event..........................: 00000400
Interrupt Mask...........................: 00000000
Error Disabled...........................: 00000000
Ethernet Control.........................: 00001018
Minimum Frame Length ....................: 00000040
Pause Time Value.........................: 00000000
DMA Control..............................: 000000C3
TBI PHY Address..........................: 0000001F

***Transmit Control and Status Registers (0x2_n100)
Transmit Control.........................: 00000000
Transmit Status..........................: 00000000
Tx BD Data Length........................: 00000000
Current TxBD Pointer.....................: 00000000
TxBD Pointer.............................: 0FFFAB18
TxBD Base Address........................: 0FFFAB18
Out of Sequence TxBD.....................: 08000000
Out of Sequence Tx Data Buffer Pointer...: 00000000

***MAC Registers (0x2_n500)
MAC Configuration #1.....................: 00000005
MAC Configuration #2.....................: 00007105
Inter Packet Gap/Inter Frame Gap.........: 40605060
Half-duplex..............................: 00A1F037
Maximum Frame............................: 00000600
MII Management: Configuration............: 00000003
MII Management: Command .................: 00000001
MII Management: Address..................: 00001E10
MII Management: Control..................: 00000001
MII Management: Status...................: 00000115
MII Management: Indicators...............: 00000000
Interface Status.........................: 00000008
Station Address, part 1..................: 1B5B0046
Station Address, part 2..................: E0000000

[U-Boot] Help with TSEC on MPC8343

[rudresh]

Hi Johnson,

i'm also facing the same problem in MPC8313 board with u-boot-1.1.6. if you
have any fix pleas send me 

Thanks
Rudresh



Johnson, Justin M (GE Infra, Energy) wrote:
> 
> I ported U-Boot 1.1.6 to a custom board I am having trouble getting the
> TSECs to work.  I am using an MPC8343 with the reduced interface, and a
> National Semiconductor DP83848 PHY.  When I do a ping, I get the following
> result:
> 
> => ping 192.168.0.100
> Trying TSEC0
> Speed: 100, full duplex
> Using TSEC0 device
> TSEC0: tsec: tx error
> TSEC0: tsec: tx buffers full
> ping failed; host 192.168.0 is not alive
> =>
> 
> When I try with the Freescale evaluation board running U-Boot 1.1.3, it
> works, so I am fairly confident of the network IP addresses, etc.
> 
> => ping 192.168.0.100
> Speed: 100, full duplex
> Using Freescale TSEC0 device
> host 192.168.0.100 is alive
> =>
> 
> I am new to all of this and an not sure what I am forgetting to set up. 
> My board's config file is based on the MPC8349ADS.h file.  I have read the
> README file and searched the mailing list, but haven't found (or
> completely missed) what I need.  Below are some register values at the
> time the Tx Error occurred.  Any help will be greatly appreciated. 
> 
> 
> 
> ***General Control and Status Registers (0x2_n000)
> Interrupt Event..........................: 00000400
> Interrupt Mask...........................: 00000000
> Error Disabled...........................: 00000000
> Ethernet Control.........................: 00001018
> Minimum Frame Length ....................: 00000040
> Pause Time Value.........................: 00000000
> DMA Control..............................: 000000C3
> TBI PHY Address..........................: 0000001F
> 
> ***Transmit Control and Status Registers (0x2_n100)
> Transmit Control.........................: 00000000
> Transmit Status..........................: 00000000
> Tx BD Data Length........................: 00000000
> Current TxBD Pointer.....................: 00000000
> TxBD Pointer.............................: 0FFFAB18
> TxBD Base Address........................: 0FFFAB18
> Out of Sequence TxBD.....................: 08000000
> Out of Sequence Tx Data Buffer Pointer...: 00000000
> 
> ***MAC Registers (0x2_n500)
> MAC Configuration #1.....................: 00000005
> MAC Configuration #2.....................: 00007105
> Inter Packet Gap/Inter Frame Gap.........: 40605060
> Half-duplex..............................: 00A1F037
> Maximum Frame............................: 00000600
> MII Management: Configuration............: 00000003
> MII Management: Command .................: 00000001
> MII Management: Address..................: 00001E10
> MII Management: Control..................: 00000001
> MII Management: Status...................: 00000115
> MII Management: Indicators...............: 00000000
> Interface Status.........................: 00000008
> Station Address, part 1..................: 1B5B0046
> Station Address, part 2..................: E0000000
> 
> 
> 
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