From mboxrd@z Thu Jan 1 00:00:00 1970 From: rudresh Date: Fri, 6 Mar 2009 02:22:20 -0800 (PST) Subject: [U-Boot] Help with TSEC on MPC8343 In-Reply-To: References: Message-ID: <22369254.post@talk.nabble.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Johnson, i'm also facing the same problem in MPC8313 board with u-boot-1.1.6. if you have any fix pleas send me Thanks Rudresh Johnson, Justin M (GE Infra, Energy) wrote: > > I ported U-Boot 1.1.6 to a custom board I am having trouble getting the > TSECs to work. I am using an MPC8343 with the reduced interface, and a > National Semiconductor DP83848 PHY. When I do a ping, I get the following > result: > > => ping 192.168.0.100 > Trying TSEC0 > Speed: 100, full duplex > Using TSEC0 device > TSEC0: tsec: tx error > TSEC0: tsec: tx buffers full > ping failed; host 192.168.0 is not alive > => > > When I try with the Freescale evaluation board running U-Boot 1.1.3, it > works, so I am fairly confident of the network IP addresses, etc. > > => ping 192.168.0.100 > Speed: 100, full duplex > Using Freescale TSEC0 device > host 192.168.0.100 is alive > => > > I am new to all of this and an not sure what I am forgetting to set up. > My board's config file is based on the MPC8349ADS.h file. I have read the > README file and searched the mailing list, but haven't found (or > completely missed) what I need. Below are some register values at the > time the Tx Error occurred. Any help will be greatly appreciated. > > > > ***General Control and Status Registers (0x2_n000) > Interrupt Event..........................: 00000400 > Interrupt Mask...........................: 00000000 > Error Disabled...........................: 00000000 > Ethernet Control.........................: 00001018 > Minimum Frame Length ....................: 00000040 > Pause Time Value.........................: 00000000 > DMA Control..............................: 000000C3 > TBI PHY Address..........................: 0000001F > > ***Transmit Control and Status Registers (0x2_n100) > Transmit Control.........................: 00000000 > Transmit Status..........................: 00000000 > Tx BD Data Length........................: 00000000 > Current TxBD Pointer.....................: 00000000 > TxBD Pointer.............................: 0FFFAB18 > TxBD Base Address........................: 0FFFAB18 > Out of Sequence TxBD.....................: 08000000 > Out of Sequence Tx Data Buffer Pointer...: 00000000 > > ***MAC Registers (0x2_n500) > MAC Configuration #1.....................: 00000005 > MAC Configuration #2.....................: 00007105 > Inter Packet Gap/Inter Frame Gap.........: 40605060 > Half-duplex..............................: 00A1F037 > Maximum Frame............................: 00000600 > MII Management: Configuration............: 00000003 > MII Management: Command .................: 00000001 > MII Management: Address..................: 00001E10 > MII Management: Control..................: 00000001 > MII Management: Status...................: 00000115 > MII Management: Indicators...............: 00000000 > Interface Status.........................: 00000008 > Station Address, part 1..................: 1B5B0046 > Station Address, part 2..................: E0000000 > > > > ------------------------------------------------------------------------- > Take Surveys. Earn Cash. Influence the Future of IT > Join SourceForge.net's Techsay panel and you'll get the chance to share > your > opinions on IT & business topics through brief surveys - and earn cash > http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users at lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users > > -- View this message in context: http://www.nabble.com/NAND-boot-from-file-tp7930776p22369254.html Sent from the Uboot - Users mailing list archive at Nabble.com.