[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Kever Yang]

Some function like the dram capability decode and dram_init() are
the same for all Rockchip SoCs, maybe alaso cap detect function later,
add sdram_common.c for all SoC driver.



Kever Yang (7):
  rockchip: add sdram_common for common functions
  rockchip: use common sdram function
  rockchip: rk3328: add sdram driver in U-Boot
  rockchip: rk3368: add sdram driver for U-Boot
  rockchip: dts: rk3328: add dmc node
  rockchip: dts: rk3368: add dmc node
  rockchip: correct the bank0 ram size

 arch/arm/dts/rk3328.dtsi                          |  7 ++
 arch/arm/dts/rk3368.dtsi                          |  7 ++
 arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
 arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
 arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
 arch/arm/mach-rockchip/Makefile                   |  3 +
 arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
 arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
 arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
 arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
 arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
 arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97 ++---------------------
 arch/arm/mach-rockchip/sdram_common.c             | 71 +++++++++++++++++
 board/rockchip/evb_rk3328/evb-rk3328.c            |  8 +-
 board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
 board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
 board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
 20 files changed, 324 insertions(+), 349 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
 create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
 create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
 create mode 100644 arch/arm/mach-rockchip/sdram_common.c

-- 
1.9.1

[U-Boot] [PATCH 1/7] rockchip: add sdram_common for common functions

[Kever Yang]

There are some functions like sdram_size_mb can be re-used for
different rockchip SoCs, just put them into common file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++++++
 arch/arm/mach-rockchip/Makefile                   |  3 +
 arch/arm/mach-rockchip/sdram_common.c             | 71 +++++++++++++++++++++++
 3 files changed, 132 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
 create mode 100644 arch/arm/mach-rockchip/sdram_common.c

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
new file mode 100644
index 0000000..fec8586
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_COMMON_H
+#define _ASM_ARCH_SDRAM_COMMON_H
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+*/
+#define SYS_REG_DDRTYPE_SHIFT		13
+#define SYS_REG_DDRTYPE_MASK		7
+#define SYS_REG_NUM_CH_SHIFT		12
+#define SYS_REG_NUM_CH_MASK		1
+#define SYS_REG_ROW_3_4_SHIFT(ch)	(30 + (ch))
+#define SYS_REG_ROW_3_4_MASK		1
+#define SYS_REG_CHINFO_SHIFT(ch)	(28 + (ch))
+#define SYS_REG_RANK_SHIFT(ch)		(11 + (ch) * 16)
+#define SYS_REG_RANK_MASK		1
+#define SYS_REG_COL_SHIFT(ch)		(9 + (ch) * 16)
+#define SYS_REG_COL_MASK		3
+#define SYS_REG_BK_SHIFT(ch)		(8 + (ch) * 16)
+#define SYS_REG_BK_MASK			1
+#define SYS_REG_CS0_ROW_SHIFT(ch)	(6 + (ch) * 16)
+#define SYS_REG_CS0_ROW_MASK		3
+#define SYS_REG_CS1_ROW_SHIFT(ch)	(4 + (ch) * 16)
+#define SYS_REG_CS1_ROW_MASK		3
+#define SYS_REG_BW_SHIFT(ch)		(2 + (ch) * 16)
+#define SYS_REG_BW_MASK			3
+#define SYS_REG_DBW_SHIFT(ch)		((ch) * 16)
+#define SYS_REG_DBW_MASK		3
+
+/* Get sdram size decode from reg */
+size_t rockchip_sdram_size(phys_addr_t reg);
+
+/* Called by U-Boot board_init_r for Rockchip SoCs */
+int dram_init(void);
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 71dd66d..cb8d3ef 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -21,6 +21,9 @@ obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
+ifdef CONFIG_RAM
+obj-y += sdram_common.o
+endif
 endif
 ifndef CONFIG_ARM64
 obj-y += rk_timer.o
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
new file mode 100644
index 0000000..e14677f
--- /dev/null
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <dm/uclass-internal.h>
+
+size_t rockchip_sdram_size(phys_addr_t reg)
+{
+	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
+	size_t chipsize_mb = 0;
+	size_t size_mb = 0;
+	u32 ch;
+
+	u32 sys_reg = readl(reg);
+	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
+		       & SYS_REG_NUM_CH_MASK);
+
+	for (ch = 0; ch < ch_num; ch++) {
+		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
+			SYS_REG_RANK_MASK);
+		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
+		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
+		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
+				SYS_REG_CS0_ROW_MASK);
+		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
+				SYS_REG_CS1_ROW_MASK);
+		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
+			SYS_REG_BW_MASK));
+		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
+			SYS_REG_ROW_3_4_MASK;
+
+		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
+
+		if (rank > 1)
+			chipsize_mb += chipsize_mb >> (cs0_row - cs1_row);
+		if (row_3_4)
+			chipsize_mb = chipsize_mb * 3 / 4;
+		size_mb += chipsize_mb;
+	}
+
+	return size_mb << 20;
+}
+
+int dram_init(void)
+{
+	struct ram_info ram;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return ret;
+	}
+	ret = ram_get_info(dev, &ram);
+	if (ret) {
+		debug("Cannot get DRAM size: %d\n", ret);
+		return ret;
+	}
+	debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
+	gd->ram_size = ram.size;
+
+	return 0;
+}
-- 
1.9.1

[U-Boot] [PATCH 2/7] rockchip: use common sdram function

[Kever Yang]

Replace the sdram_init() in board init and rockchip_sdram_size() in
sdram driver for all the Rockchip SoCs which enable CONFIG_RAM.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
 arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
 arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
 arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
 arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97 ++---------------------
 board/rockchip/evb_rk3328/evb-rk3328.c            |  6 --
 board/rockchip/evb_rk3399/evb-rk3399.c            | 22 -----
 board/rockchip/sheep_rk3368/sheep_rk3368.c        |  7 --
 board/theobroma-systems/puma_rk3399/puma-rk3399.c | 22 -----
 10 files changed, 37 insertions(+), 344 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h b/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h
index 9a59075..35696c7 100644
--- a/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h
@@ -441,52 +441,4 @@ enum {
 /* mr1 for ddr3 */
 #define DDR3_DLL_DISABLE		1
 
-/*
- *TODO(sjg at chromium.org): We use a PMU register to store SDRAM information for
- * passing from SPL to U-Boot. It would probably be better to use a normal C
- * structure in SRAM.
- *
- * sys_reg bitfield struct
- * [31] row_3_4_ch1
- * [30] row_3_4_ch0
- * [29:28] chinfo
- * [27] rank_ch1
- * [26:25] col_ch1
- * [24] bk_ch1
- * [23:22] cs0_row_ch1
- * [21:20] cs1_row_ch1
- * [19:18] bw_ch1
- * [17:16] dbw_ch1;
- * [15:13] ddrtype
- * [12] channelnum
- * [11] rank_ch0
- * [10:9] col_ch0
- * [8] bk_ch0
- * [7:6] cs0_row_ch0
- * [5:4] cs1_row_ch0
- * [3:2] bw_ch0
- * [1:0] dbw_ch0
-*/
-#define SYS_REG_DDRTYPE_SHIFT		13
-#define SYS_REG_DDRTYPE_MASK		7
-#define SYS_REG_NUM_CH_SHIFT		12
-#define SYS_REG_NUM_CH_MASK		1
-#define SYS_REG_ROW_3_4_SHIFT(ch)	(30 + (ch))
-#define SYS_REG_ROW_3_4_MASK		1
-#define SYS_REG_CHINFO_SHIFT(ch)	(28 + (ch))
-#define SYS_REG_RANK_SHIFT(ch)		(11 + (ch) * 16)
-#define SYS_REG_RANK_MASK		1
-#define SYS_REG_COL_SHIFT(ch)		(9 + (ch) * 16)
-#define SYS_REG_COL_MASK		3
-#define SYS_REG_BK_SHIFT(ch)		(8 + (ch) * 16)
-#define SYS_REG_BK_MASK			1
-#define SYS_REG_CS0_ROW_SHIFT(ch)	(6 + (ch) * 16)
-#define SYS_REG_CS0_ROW_MASK		3
-#define SYS_REG_CS1_ROW_SHIFT(ch)	(4 + (ch) * 16)
-#define SYS_REG_CS1_ROW_MASK		3
-#define SYS_REG_BW_SHIFT(ch)		(2 + (ch) * 16)
-#define SYS_REG_BW_MASK			3
-#define SYS_REG_DBW_SHIFT(ch)		((ch) * 16)
-#define SYS_REG_DBW_MASK		3
-
 #endif
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 4be711e..3e76100 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -72,28 +72,6 @@ err:
 #endif
 }
 
-int dram_init(void)
-{
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
-	gd->ram_size = ram.size;
-
-	return 0;
-}
-
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c b/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
index 946a9f1..1d2d416 100644
--- a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
@@ -22,6 +22,7 @@
 #include <asm/arch/grf_rk3188.h>
 #include <asm/arch/pmu_rk3188.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
 #include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -796,49 +797,7 @@ error:
 	printf("DRAM init failed!\n");
 	hang();
 }
-#endif /* CONFIG_SPL_BUILD */
-
-size_t sdram_size_mb(struct rk3188_pmu *pmu)
-{
-	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
-	size_t chipsize_mb = 0;
-	size_t size_mb = 0;
-	u32 ch;
-	u32 sys_reg = readl(&pmu->sys_reg[2]);
-	u32 chans;
-
-	chans = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT) & SYS_REG_NUM_CH_MASK);
-
-	for (ch = 0; ch < chans; ch++) {
-		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
-			SYS_REG_RANK_MASK);
-		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
-		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
-		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
-				SYS_REG_CS0_ROW_MASK);
-		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
-				SYS_REG_CS1_ROW_MASK);
-		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
-			SYS_REG_BW_MASK));
-		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
-			SYS_REG_ROW_3_4_MASK;
-		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
-
-		if (rank > 1)
-			chipsize_mb += chipsize_mb >>
-				(cs0_row - cs1_row);
-		if (row_3_4)
-			chipsize_mb = chipsize_mb * 3 / 4;
-		size_mb += chipsize_mb;
-	}
-
-	/* there can be no more than 2gb of memory */
-	size_mb = min(size_mb, 0x80000000 >> 20);
-
-	return size_mb;
-}
 
-#ifdef CONFIG_SPL_BUILD
 static int setup_sdram(struct udevice *dev)
 {
 	struct dram_info *priv = dev_get_priv(dev);
@@ -915,12 +874,15 @@ static int rk3188_dmc_probe(struct udevice *dev)
 {
 #ifdef CONFIG_SPL_BUILD
 	struct rk3188_sdram_params *plat = dev_get_platdata(dev);
-#endif
-	struct dram_info *priv = dev_get_priv(dev);
 	struct regmap *map;
-	int ret;
 	struct udevice *dev_clk;
+	int ret;
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
 
+#ifdef CONFIG_SPL_BUILD
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	ret = conv_of_platdata(dev);
 	if (ret)
@@ -932,12 +894,9 @@ static int rk3188_dmc_probe(struct udevice *dev)
 	priv->chan[0].msch = regmap_get_range(map, 0);
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
 
-#ifdef CONFIG_SPL_BUILD
 	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
 	priv->chan[0].publ = regmap_get_range(plat->map, 1);
-#endif
 
 	ret = rockchip_get_clk(&dev_clk);
 	if (ret)
@@ -950,13 +909,13 @@ static int rk3188_dmc_probe(struct udevice *dev)
 	priv->cru = rockchip_get_cru();
 	if (IS_ERR(priv->cru))
 		return PTR_ERR(priv->cru);
-#ifdef CONFIG_SPL_BUILD
 	ret = setup_sdram(dev);
 	if (ret)
 		return ret;
-#endif
+#else
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = sdram_size_mb(priv->pmu) << 20;
+	priv->info.size = rockchip_sdram_size(&priv->pmu->sys_reg[2]);
+#endif
 
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 9894a25..c9d16a9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -155,28 +155,6 @@ err:
 #endif
 }
 
-int dram_init(void)
-{
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
-	gd->ram_size = ram.size;
-
-	return 0;
-}
-
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index 2feda61..4a9b5c9 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -22,6 +22,7 @@
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include <power/rk8xx_pmic.h>
@@ -923,53 +924,7 @@ error:
 	printf("DRAM init failed!\n");
 	hang();
 }
-#endif /* CONFIG_SPL_BUILD */
-
-size_t sdram_size_mb(struct rk3288_pmu *pmu)
-{
-	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
-	size_t chipsize_mb = 0;
-	size_t size_mb = 0;
-	u32 ch;
-	u32 sys_reg = readl(&pmu->sys_reg[2]);
-	u32 chans;
-
-	chans = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT) & SYS_REG_NUM_CH_MASK);
-
-	for (ch = 0; ch < chans; ch++) {
-		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
-			SYS_REG_RANK_MASK);
-		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
-		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
-		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
-				SYS_REG_CS0_ROW_MASK);
-		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
-				SYS_REG_CS1_ROW_MASK);
-		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
-			SYS_REG_BW_MASK));
-		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
-			SYS_REG_ROW_3_4_MASK;
-		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
-
-		if (rank > 1)
-			chipsize_mb += chipsize_mb >>
-				(cs0_row - cs1_row);
-		if (row_3_4)
-			chipsize_mb = chipsize_mb * 3 / 4;
-		size_mb += chipsize_mb;
-	}
 
-	/*
-	* we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
-	* is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is 
-	* inaccessible for some IP controller.
-	*/
-	size_mb = min(size_mb, 0xfe000000 >> 20);
-
-	return size_mb;
-}
-
-#ifdef CONFIG_SPL_BUILD
 # ifdef CONFIG_ROCKCHIP_FAST_SPL
 static int veyron_init(struct dram_info *priv)
 {
@@ -1087,12 +1042,16 @@ static int rk3288_dmc_probe(struct udevice *dev)
 {
 #ifdef CONFIG_SPL_BUILD
 	struct rk3288_sdram_params *plat = dev_get_platdata(dev);
-#endif
-	struct dram_info *priv = dev_get_priv(dev);
+	struct udevice *dev_clk;
 	struct regmap *map;
 	int ret;
-	struct udevice *dev_clk;
+#else
+	size_t size;
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
 
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
+#ifdef CONFIG_SPL_BUILD
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	ret = conv_of_platdata(dev);
 	if (ret)
@@ -1107,14 +1066,12 @@ static int rk3288_dmc_probe(struct udevice *dev)
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	priv->sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
 
-#ifdef CONFIG_SPL_BUILD
 	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
 	priv->chan[0].publ = regmap_get_range(plat->map, 1);
 	priv->chan[1].pctl = regmap_get_range(plat->map, 2);
 	priv->chan[1].publ = regmap_get_range(plat->map, 3);
-#endif
+
 	ret = rockchip_get_clk(&dev_clk);
 	if (ret)
 		return ret;
@@ -1126,13 +1083,20 @@ static int rk3288_dmc_probe(struct udevice *dev)
 	priv->cru = rockchip_get_cru();
 	if (IS_ERR(priv->cru))
 		return PTR_ERR(priv->cru);
-#ifdef CONFIG_SPL_BUILD
 	ret = setup_sdram(dev);
 	if (ret)
 		return ret;
+#else
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	size = rockchip_sdram_size(priv->pmu->sys_reg[2]);
+
+	/*
+	* we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+	* is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+	* inaccessible for some IP controller.
+	*/
+	priv->info.size = min(size, 0xfe000000);
 #endif
-	priv->info.base = 0;
-	priv->info.size = sdram_size_mb(priv->pmu) << 20;
 
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
index 1b91bb1..8970bdc 100644
--- a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
@@ -15,6 +15,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_rk3399.h>
 #include <asm/arch/cru_rk3399.h>
 #include <asm/arch/grf_rk3399.h>
@@ -43,50 +44,6 @@ struct dram_info {
 	struct rk3399_pmugrf_regs *pmugrf;
 };
 
-/*
- * sys_reg bitfield struct
- * [31]		row_3_4_ch1
- * [30]		row_3_4_ch0
- * [29:28]	chinfo
- * [27]		rank_ch1
- * [26:25]	col_ch1
- * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
- * [19:18]	bw_ch1
- * [17:16]	dbw_ch1;
- * [15:13]	ddrtype
- * [12]		channelnum
- * [11]		rank_ch0
- * [10:9]	col_ch0
- * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
- * [3:2]	bw_ch0
- * [1:0]	dbw_ch0
-*/
-#define SYS_REG_DDRTYPE_SHIFT		13
-#define SYS_REG_DDRTYPE_MASK		7
-#define SYS_REG_NUM_CH_SHIFT		12
-#define SYS_REG_NUM_CH_MASK		1
-#define SYS_REG_ROW_3_4_SHIFT(ch)	(30 + (ch))
-#define SYS_REG_ROW_3_4_MASK		1
-#define SYS_REG_CHINFO_SHIFT(ch)	(28 + (ch))
-#define SYS_REG_RANK_SHIFT(ch)		(11 + (ch) * 16)
-#define SYS_REG_RANK_MASK		1
-#define SYS_REG_COL_SHIFT(ch)		(9 + (ch) * 16)
-#define SYS_REG_COL_MASK		3
-#define SYS_REG_BK_SHIFT(ch)		(8 + (ch) * 16)
-#define SYS_REG_BK_MASK			1
-#define SYS_REG_CS0_ROW_SHIFT(ch)	(6 + (ch) * 16)
-#define SYS_REG_CS0_ROW_MASK		3
-#define SYS_REG_CS1_ROW_SHIFT(ch)	(4 + (ch) * 16)
-#define SYS_REG_CS1_ROW_MASK		3
-#define SYS_REG_BW_SHIFT(ch)		(2 + (ch) * 16)
-#define SYS_REG_BW_MASK			3
-#define SYS_REG_DBW_SHIFT(ch)		((ch) * 16)
-#define SYS_REG_DBW_MASK		3
-
 #define PRESET_SGRF_HOLD(n)	((0x1 << (6 + 16)) | ((n) << 6))
 #define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
 #define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
@@ -1231,50 +1188,6 @@ static int rk3399_dmc_init(struct udevice *dev)
 }
 #endif
 
-size_t sdram_size_mb(struct dram_info *dram)
-{
-	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
-	size_t chipsize_mb = 0;
-	size_t size_mb = 0;
-	u32 ch;
-
-	u32 sys_reg = readl(&dram->pmugrf->os_reg2);
-	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
-		       & SYS_REG_NUM_CH_MASK);
-
-	for (ch = 0; ch < ch_num; ch++) {
-		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
-			SYS_REG_RANK_MASK);
-		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
-		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
-		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
-				SYS_REG_CS0_ROW_MASK);
-		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
-				SYS_REG_CS1_ROW_MASK);
-		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
-			SYS_REG_BW_MASK));
-		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
-			SYS_REG_ROW_3_4_MASK;
-
-		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
-
-		if (rank > 1)
-			chipsize_mb += chipsize_mb >> (cs0_row - cs1_row);
-		if (row_3_4)
-			chipsize_mb = chipsize_mb * 3 / 4;
-		size_mb += chipsize_mb;
-	}
-
-	/*
-	 * we use the 0x00000000~0xf7ffffff space
-	 * since 0xf8000000~0xffffffff is soc register space
-	 * so we reserve it
-	 */
-	size_mb = min_t(size_t, size_mb, 0xf8000000/(1<<20));
-
-	return size_mb;
-}
-
 static int rk3399_dmc_probe(struct udevice *dev)
 {
 #ifdef CONFIG_SPL_BUILD
@@ -1286,7 +1199,13 @@ static int rk3399_dmc_probe(struct udevice *dev)
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = 0;
-	priv->info.size = sdram_size_mb(priv) << 20;
+	priv->info.size = rockchip_sdram_size(&priv->pmugrf->os_reg2);
+	/*
+	* we use the 0x00000000~0xf7ffffff space
+	* since 0xf8000000~0xffffffff is soc register space
+	* so we reserve it
+	*/
+	priv->info.size = min_t(size_t, priv->info.size, 0xf8000000);
 #endif
 	return 0;
 }
diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index 0a26ed5..75674bb 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -16,12 +16,6 @@ int board_init(void)
 	return 0;
 }
 
-int dram_init(void)
-{
-	gd->ram_size = 0x80000000;
-	return 0;
-}
-
 int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index f63f003..950bde6 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -68,28 +68,6 @@ out:
 	return 0;
 }
 
-int dram_init(void)
-{
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	debug("SDRAM base=%llx, size=%x\n", ram.base, (unsigned int)ram.size);
-	gd->ram_size = ram.size;
-
-	return 0;
-}
-
 int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
index df1fd9d..e6d2361 100644
--- a/board/rockchip/sheep_rk3368/sheep_rk3368.c
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -21,13 +21,6 @@ int board_init(void)
 	return 0;
 }
 
-int dram_init(void)
-{
-	gd->ram_size = 0x80000000;
-
-	return 0;
-}
-
 int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = 0x200000;
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 6fff3e1..740baf5 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -181,28 +181,6 @@ void get_board_serial(struct tag_serialnr *serialnr)
 }
 #endif
 
-int dram_init(void)
-{
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	debug("SDRAM base=%llx, size=%x\n", ram.base, (unsigned int)ram.size);
-	gd->ram_size = ram.size;
-
-	return 0;
-}
-
 int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
-- 
1.9.1

[U-Boot] [PATCH 3/7] rockchip: rk3328: add sdram driver in U-Boot

[Kever Yang]

Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/rk3328/Makefile       |  1 +
 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c | 66 ++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c

diff --git a/arch/arm/mach-rockchip/rk3328/Makefile b/arch/arm/mach-rockchip/rk3328/Makefile
index bbab036..72873e2 100644
--- a/arch/arm/mach-rockchip/rk3328/Makefile
+++ b/arch/arm/mach-rockchip/rk3328/Makefile
@@ -6,4 +6,5 @@
 
 obj-y += clk_rk3328.o
 obj-y += rk3328.o
+obj-y += sdram_rk3328.o
 obj-y += syscon_rk3328.o
diff --git a/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c b/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
new file mode 100644
index 0000000..79dd8ae
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
@@ -0,0 +1,66 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct rk3328_grf_regs *grf;
+};
+
+static int rk3328_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[2]);
+	/*
+	* we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+	* is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+	* inaccessible for some IP controller.
+	*/
+	priv->info.size = min(priv->info.size, 0xfe000000);
+
+	return 0;
+}
+
+static int rk3328_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3328_dmc_ops = {
+	.get_info = rk3328_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3328_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3328-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3328) = {
+	.name = "rockchip_rk3328_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3328_dmc_ids,
+	.ops = &rk3328_dmc_ops,
+	.probe = rk3328_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};
-- 
1.9.1

[U-Boot] [PATCH 4/7] rockchip: rk3368: add sdram driver for U-Boot

[Kever Yang]

Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/grf_rk3368.h |  4 +-
 arch/arm/mach-rockchip/rk3368/Makefile          |  1 +
 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c    | 66 +++++++++++++++++++++++++
 3 files changed, 70 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
index 3233dc3..93c4e7d 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
@@ -92,8 +92,10 @@ struct rk3368_pmu_grf {
 	u32 gpio0d_drv;
 	u32 gpio0l_sr;
 	u32 gpio0h_sr;
+	u32 reserved[(0x200 - 0x34) / 4 - 1];
+	u32 os_reg[4];
 };
-check_member(rk3368_pmu_grf, gpio0h_sr, 0x34);
+check_member(rk3368_pmu_grf, os_reg[3], 0x20c);
 
 /*GRF_GPIO0C_IOMUX*/
 enum {
diff --git a/arch/arm/mach-rockchip/rk3368/Makefile b/arch/arm/mach-rockchip/rk3368/Makefile
index 46798c2..0390716 100644
--- a/arch/arm/mach-rockchip/rk3368/Makefile
+++ b/arch/arm/mach-rockchip/rk3368/Makefile
@@ -5,4 +5,5 @@
 #
 obj-y		+= clk_rk3368.o
 obj-y		+= rk3368.o
+obj-y 		+= sdram_rk3368.o
 obj-y 		+= syscon_rk3368.o
diff --git a/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c b/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
new file mode 100644
index 0000000..378734c
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
@@ -0,0 +1,66 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct rk3368_pmu_grf *pmugrf;
+};
+
+static int rk3368_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	debug("%s: grf=%p\n", __func__, priv->pmugrf);
+	priv->info.base = 0;
+	priv->info.size = rockchip_sdram_size(
+			(phys_addr_t)&priv->pmugrf->os_reg[2]);
+	/*
+	* we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+	* is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+	* inaccessible for some IP controller.
+	*/
+	priv->info.size = min(priv->info.size, 0xfe000000);
+
+	return 0;
+}
+
+static int rk3368_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3368_dmc_ops = {
+	.get_info = rk3368_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3368_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3368-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3368) = {
+	.name = "rockchip_rk3368_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3368_dmc_ids,
+	.ops = &rk3368_dmc_ops,
+	.probe = rk3368_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};
-- 
1.9.1

[U-Boot] [PATCH 5/7] rockchip: dts: rk3328: add dmc node

[Kever Yang]

Add a dmc node for sdram driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/dts/rk3328.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index f18cfc2..50e5df5 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -184,6 +184,7 @@
 	};
 
 	grf: syscon at ff100000 {
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff100000 0x0 0x1000>;
 		#address-cells = <1>;
@@ -350,6 +351,12 @@
 		status = "disabled";
 	};
 
+	dmc: dmc at ff400000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3328-dmc", "syscon";
+		reg = <0x0 0xff400000 0x0 0x1000>;
+	};
+
 	cru: clock-controller at ff440000 {
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
-- 
1.9.1

[U-Boot] [PATCH 6/7] rockchip: dts: rk3368: add dmc node

[Kever Yang]

Add dmc node to enable sdram driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/dts/rk3368.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 025dc32..9daf765 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -546,6 +546,12 @@
 		status = "disabled";
 	};
 
+	dmc: dmc at ff610000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3368-dmc", "syscon";
+		reg = <0x0 0xff610000 0x0 0x1000>;
+	};
+
 	i2c0: i2c at ff650000 {
 		compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
 		reg = <0x0 0xff650000 0x0 0x1000>;
@@ -641,6 +647,7 @@
 	};
 
 	pmugrf: syscon at ff738000 {
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3368-pmugrf", "syscon";
 		reg = <0x0 0xff738000 0x0 0x1000>;
 	};
-- 
1.9.1

[U-Boot] [PATCH 7/7] rockchip: correct the bank0 ram size

[Kever Yang]

The bank0 ram size should be the DRAM size minus reserved size,
the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 board/rockchip/evb_rk3328/evb-rk3328.c            | 2 +-
 board/rockchip/evb_rk3399/evb-rk3399.c            | 2 +-
 board/rockchip/sheep_rk3368/sheep_rk3368.c        | 2 +-
 board/theobroma-systems/puma_rk3399/puma-rk3399.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index 75674bb..4e13cca 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -20,7 +20,7 @@ int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = 0x7e000000;
+	gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start;
 
 	return 0;
 }
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index 950bde6..751374d 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -72,7 +72,7 @@ int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = 0x7e000000;
+	gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start;
 
 	return 0;
 }
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
index e6d2361..c23b8f9 100644
--- a/board/rockchip/sheep_rk3368/sheep_rk3368.c
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -24,7 +24,7 @@ int board_init(void)
 int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = 0x7fe00000;
+	gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start;
 
 	return 0;
 }
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 740baf5..2d96eec 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -185,7 +185,7 @@ int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = 0x7e000000;
+	gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start;
 
 	return 0;
 }
-- 
1.9.1

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Dr. Philipp Tomsich]

Kever,

thanks a lot! I had just started to work on RK3368 SPL code and the DDR
controller would have been next on the list…
You saved me quite a bit of work there.

Regards,
Philipp.


> On 13 Jun 2017, at 11:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> 
> 
> Some function like the dram capability decode and dram_init() are
> the same for all Rockchip SoCs, maybe alaso cap detect function later,
> add sdram_common.c for all SoC driver.
> 
> 
> 
> Kever Yang (7):
>  rockchip: add sdram_common for common functions
>  rockchip: use common sdram function
>  rockchip: rk3328: add sdram driver in U-Boot
>  rockchip: rk3368: add sdram driver for U-Boot
>  rockchip: dts: rk3328: add dmc node
>  rockchip: dts: rk3368: add dmc node
>  rockchip: correct the bank0 ram size
> 
> arch/arm/dts/rk3328.dtsi                          |  7 ++
> arch/arm/dts/rk3368.dtsi                          |  7 ++
> arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
> arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
> arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
> arch/arm/mach-rockchip/Makefile                   |  3 +
> arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
> arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
> arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
> arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
> arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
> arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
> arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
> arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97 ++---------------------
> arch/arm/mach-rockchip/sdram_common.c             | 71 +++++++++++++++++
> board/rockchip/evb_rk3328/evb-rk3328.c            |  8 +-
> board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
> board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
> board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
> 20 files changed, 324 insertions(+), 349 deletions(-)
> create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
> create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
> create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
> create mode 100644 arch/arm/mach-rockchip/sdram_common.c
> 
> -- 
> 1.9.1
> 

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Heiko Stübner]

Am Dienstag, 13. Juni 2017, 11:31:53 CEST schrieb Dr. Philipp Tomsich:
> Kever,
> 
> thanks a lot! I had just started to work on RK3368 SPL code and the DDR
> controller would have been next on the list…
> You saved me quite a bit of work there.

Although the sdram drivers for rk3328 and rk3368 only seem to provide the
non-spl portions for now.

Kever, is there a rough time estimate for spl support for these socs?
(Got a rk3328-rock64 sample yesterday, so would be interested on getting
a mainline u-boot to run on it)


Thanks
Heiko

> 
> Regards,
> Philipp.
> 
> > On 13 Jun 2017, at 11:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> > 
> > 
> > Some function like the dram capability decode and dram_init() are
> > the same for all Rockchip SoCs, maybe alaso cap detect function later,
> > add sdram_common.c for all SoC driver.
> > 
> > Kever Yang (7):
> >  rockchip: add sdram_common for common functions
> >  rockchip: use common sdram function
> >  rockchip: rk3328: add sdram driver in U-Boot
> >  rockchip: rk3368: add sdram driver for U-Boot
> >  rockchip: dts: rk3328: add dmc node
> >  rockchip: dts: rk3368: add dmc node
> >  rockchip: correct the bank0 ram size
> > 
> > arch/arm/dts/rk3328.dtsi                          |  7 ++
> > arch/arm/dts/rk3368.dtsi                          |  7 ++
> > arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
> > arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
> > arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
> > arch/arm/mach-rockchip/Makefile                   |  3 +
> > arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
> > arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
> > arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
> > arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
> > arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
> > arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
> > arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
> > arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
> > arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97
> > ++--------------------- arch/arm/mach-rockchip/sdram_common.c            
> > | 71 +++++++++++++++++ board/rockchip/evb_rk3328/evb-rk3328.c           
> > |  8 +-
> > board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
> > board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
> > board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
> > 20 files changed, 324 insertions(+), 349 deletions(-)
> > create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
> > create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
> > create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
> > create mode 100644 arch/arm/mach-rockchip/sdram_common.c

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Dr. Philipp Tomsich]

I just realised this myself after pulling it into my tree to take a closer look
and possibly give it a spin… my euphoria was gone rather quickly.

Since I have SPL set up for the 3368 and have all the "necessary notes”
(which usually leads into the realisation that there’s necessary and sufficient
are two very distinct concepts) on my desk to write the DRAM init code for it,
I might as well sit down and continue down this path.

We have quite a few RK3368-uQ7 modules in the lab—so having mainline
U-Boot support is becoming a priority.

> On 13 Jun 2017, at 12:04, Heiko Stübner <heiko@sntech.de> wrote:
> 
> Am Dienstag, 13. Juni 2017, 11:31:53 CEST schrieb Dr. Philipp Tomsich:
>> Kever,
>> 
>> thanks a lot! I had just started to work on RK3368 SPL code and the DDR
>> controller would have been next on the list…
>> You saved me quite a bit of work there.
> 
> Although the sdram drivers for rk3328 and rk3368 only seem to provide the
> non-spl portions for now.
> 
> Kever, is there a rough time estimate for spl support for these socs?
> (Got a rk3328-rock64 sample yesterday, so would be interested on getting
> a mainline u-boot to run on it)
> 
> 
> Thanks
> Heiko
> 
>> 
>> Regards,
>> Philipp.
>> 
>>> On 13 Jun 2017, at 11:29, Kever Yang <kever.yang@rock-chips.com> wrote:
>>> 
>>> 
>>> Some function like the dram capability decode and dram_init() are
>>> the same for all Rockchip SoCs, maybe alaso cap detect function later,
>>> add sdram_common.c for all SoC driver.
>>> 
>>> Kever Yang (7):
>>> rockchip: add sdram_common for common functions
>>> rockchip: use common sdram function
>>> rockchip: rk3328: add sdram driver in U-Boot
>>> rockchip: rk3368: add sdram driver for U-Boot
>>> rockchip: dts: rk3328: add dmc node
>>> rockchip: dts: rk3368: add dmc node
>>> rockchip: correct the bank0 ram size
>>> 
>>> arch/arm/dts/rk3328.dtsi                          |  7 ++
>>> arch/arm/dts/rk3368.dtsi                          |  7 ++
>>> arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
>>> arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
>>> arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
>>> arch/arm/mach-rockchip/Makefile                   |  3 +
>>> arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
>>> arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
>>> arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
>>> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
>>> arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
>>> arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
>>> arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
>>> arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
>>> arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97
>>> ++--------------------- arch/arm/mach-rockchip/sdram_common.c            
>>> | 71 +++++++++++++++++ board/rockchip/evb_rk3328/evb-rk3328.c           
>>> |  8 +-
>>> board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
>>> board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
>>> board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
>>> 20 files changed, 324 insertions(+), 349 deletions(-)
>>> create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
>>> create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
>>> create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
>>> create mode 100644 arch/arm/mach-rockchip/sdram_common.c
> 
> 

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Kever Yang]

Heiko,


On 06/13/2017 06:04 PM, Heiko Stübner wrote:
> Am Dienstag, 13. Juni 2017, 11:31:53 CEST schrieb Dr. Philipp Tomsich:
>> Kever,
>>
>> thanks a lot! I had just started to work on RK3368 SPL code and the DDR
>> controller would have been next on the list…
>> You saved me quite a bit of work there.
> Although the sdram drivers for rk3328 and rk3368 only seem to provide the
> non-spl portions for now.
>
> Kever, is there a rough time estimate for spl support for these socs?

No, I would like to provide them ASAP, but I don't get enough hands now :(
so I decide to make the U-Boot recognize correct DRAM size first which 
is the
most important.
> (Got a rk3328-rock64 sample yesterday, so would be interested on getting
> a mainline u-boot to run on it)

You can run mainline u-boot now already, just need to using Rockchip
loader instead of SPL before U-Boot.

Thanks,
- Kever
>
>
> Thanks
> Heiko
>
>> Regards,
>> Philipp.
>>
>>> On 13 Jun 2017, at 11:29, Kever Yang <kever.yang@rock-chips.com> wrote:
>>>
>>>
>>> Some function like the dram capability decode and dram_init() are
>>> the same for all Rockchip SoCs, maybe alaso cap detect function later,
>>> add sdram_common.c for all SoC driver.
>>>
>>> Kever Yang (7):
>>>   rockchip: add sdram_common for common functions
>>>   rockchip: use common sdram function
>>>   rockchip: rk3328: add sdram driver in U-Boot
>>>   rockchip: rk3368: add sdram driver for U-Boot
>>>   rockchip: dts: rk3328: add dmc node
>>>   rockchip: dts: rk3368: add dmc node
>>>   rockchip: correct the bank0 ram size
>>>
>>> arch/arm/dts/rk3328.dtsi                          |  7 ++
>>> arch/arm/dts/rk3368.dtsi                          |  7 ++
>>> arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
>>> arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
>>> arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
>>> arch/arm/mach-rockchip/Makefile                   |  3 +
>>> arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
>>> arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
>>> arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
>>> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
>>> arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
>>> arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
>>> arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
>>> arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
>>> arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97
>>> ++--------------------- arch/arm/mach-rockchip/sdram_common.c
>>> | 71 +++++++++++++++++ board/rockchip/evb_rk3328/evb-rk3328.c
>>> |  8 +-
>>> board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
>>> board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
>>> board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
>>> 20 files changed, 324 insertions(+), 349 deletions(-)
>>> create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
>>> create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
>>> create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
>>> create mode 100644 arch/arm/mach-rockchip/sdram_common.c
>
>

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Andy Yan]

Hi Kever:


On 2017年06月13日 17:29, Kever Yang wrote:
> Some function like the dram capability decode and dram_init() are
> the same for all Rockchip SoCs, maybe alaso cap detect function later,
> add sdram_common.c for all SoC driver.
>
>
>
> Kever Yang (7):
>    rockchip: add sdram_common for common functions
>    rockchip: use common sdram function
>    rockchip: rk3328: add sdram driver in U-Boot
>    rockchip: rk3368: add sdram driver for U-Boot
>    rockchip: dts: rk3328: add dmc node
>    rockchip: dts: rk3368: add dmc node
>    rockchip: correct the bank0 ram size
>
>   arch/arm/dts/rk3328.dtsi                          |  7 ++
>   arch/arm/dts/rk3368.dtsi                          |  7 ++
>   arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
>   arch/arm/include/asm/arch-rockchip/grf_rk3368.h   |  4 +-
>   arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++
>   arch/arm/mach-rockchip/Makefile                   |  3 +
>   arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
>   arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
>   arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
>   arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
>   arch/arm/mach-rockchip/rk3328/Makefile            |  1 +
>   arch/arm/mach-rockchip/rk3328/sdram_rk3328.c      | 66 +++++++++++++++
>   arch/arm/mach-rockchip/rk3368/Makefile            |  1 +
>   arch/arm/mach-rockchip/rk3368/sdram_rk3368.c      | 66 +++++++++++++++
>   arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97 ++---------------------
>   arch/arm/mach-rockchip/sdram_common.c             | 71 +++++++++++++++++
>   board/rockchip/evb_rk3328/evb-rk3328.c            |  8 +-
>   board/rockchip/evb_rk3399/evb-rk3399.c            | 24 +-----
>   board/rockchip/sheep_rk3368/sheep_rk3368.c        |  9 +--
>   board/theobroma-systems/puma_rk3399/puma-rk3399.c | 24 +-----
>   20 files changed, 324 insertions(+), 349 deletions(-)
>   create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
>   create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
>   create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
>   create mode 100644 arch/arm/mach-rockchip/sdram_common.c

     This function tested ok on RK3368 based platform, but it seems that 
you have missed the support for PX5 EVB , GeekBox and RV1108.

     Another things is that I seen the following warning when compile:

  In file included from 
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c:7:0:
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c: 
In function ‘dram_init’:
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c:67:8: 
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but 
argument 2 has type ‘phys_addr_t {aka long long unsigned int}’ [-Wformat=]
   debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
         ^
/home/andy/WorkSpace/U-BOOT/u-boot/include/common.h:59:21: note: in 
definition of macro ‘pr_fmt’
  #define pr_fmt(fmt) fmt
                      ^
/home/andy/WorkSpace/U-BOOT/u-boot/include/common.h:75:2: note: in 
expansion of macro ‘debug_cond’
   debug_cond(_DEBUG, fmt, ##args)
   ^
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c:67:2: 
note: in expansion of macro ‘debug’
   debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
   ^
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c:67:8: 
warning: format ‘%x’ expects argument of type ‘unsigned int’, but 
argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
   debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
         ^
/home/andy/WorkSpace/U-BOOT/u-boot/include/common.h:59:21: note: in 
definition of macro ‘pr_fmt’
  #define pr_fmt(fmt) fmt
                      ^
/home/andy/WorkSpace/U-BOOT/u-boot/include/common.h:75:2: note: in 
expansion of macro ‘debug_cond’
   debug_cond(_DEBUG, fmt, ##args)
   ^
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/sdram_common.c:67:2: 
note: in expansion of macro ‘debug’
   debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
   ^
   LD      arch/arm/lib/built-in.o
In file included from 
/home/andy/WorkSpace/U-BOOT/u-boot/include/linux/delay.h:8:0,
                  from 
/home/andy/WorkSpace/U-BOOT/u-boot/include/common.h:26,
                  from 
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c:8:
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c: 
In function ‘rk3368_dmc_probe’:
/home/andy/WorkSpace/U-BOOT/u-boot/include/linux/kernel.h:155:17: 
warning: comparison of distinct pointer types lacks a cast
   (void) (&_min1 == &_min2);  \
                  ^
/home/andy/WorkSpace/U-BOOT/u-boot/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c:36:20: 
note: in expansion of macro ‘min’
   priv->info.size = min(priv->info.size, 0xfe000000);
                     ^

[U-Boot] [PATCH 1/7] rockchip: add sdram_common for common functions

[Simon Glass]

Hi Kever,

On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> There are some functions like sdram_size_mb can be re-used for
> different rockchip SoCs, just put them into common file.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/include/asm/arch-rockchip/sdram_common.h | 58 ++++++++++++++++++
>  arch/arm/mach-rockchip/Makefile                   |  3 +
>  arch/arm/mach-rockchip/sdram_common.c             | 71 +++++++++++++++++++++++
>  3 files changed, 132 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h
>  create mode 100644 arch/arm/mach-rockchip/sdram_common.c

Reviewed-by: Simon Glass <sjg@chromium.org>

As a follow-up patch, do you think we could change to shifted masks in
this area?

[U-Boot] [PATCH 2/7] rockchip: use common sdram function

[Simon Glass]

On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> Replace the sdram_init() in board init and rockchip_sdram_size() in
> sdram driver for all the Rockchip SoCs which enable CONFIG_RAM.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/include/asm/arch-rockchip/ddr_rk3288.h   | 48 -----------
>  arch/arm/mach-rockchip/rk3188-board.c             | 22 -----
>  arch/arm/mach-rockchip/rk3188/sdram_rk3188.c      | 61 +++-----------
>  arch/arm/mach-rockchip/rk3288-board.c             | 22 -----
>  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c      | 74 +++++------------
>  arch/arm/mach-rockchip/rk3399/sdram_rk3399.c      | 97 ++---------------------
>  board/rockchip/evb_rk3328/evb-rk3328.c            |  6 --
>  board/rockchip/evb_rk3399/evb-rk3399.c            | 22 -----
>  board/rockchip/sheep_rk3368/sheep_rk3368.c        |  7 --
>  board/theobroma-systems/puma_rk3399/puma-rk3399.c | 22 -----
>  10 files changed, 37 insertions(+), 344 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

Quite a few changes here but it looks sane.

[U-Boot] [PATCH 3/7] rockchip: rk3328: add sdram driver in U-Boot

[Simon Glass]

On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> Add sdram driver in U-Boot for get the correct sdram size from
> sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
> to get different dram capability and then tell the kernel.

Do you think we might be able to retire the Rockchip loader one day?

>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/mach-rockchip/rk3328/Makefile       |  1 +
>  arch/arm/mach-rockchip/rk3328/sdram_rk3328.c | 66 ++++++++++++++++++++++++++++
>  2 files changed, 67 insertions(+)
>  create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 4/7] rockchip: rk3368: add sdram driver for U-Boot

[Simon Glass]

On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
> Add sdram driver in U-Boot for get the correct sdram size from
> sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
> to get different dram capability and then tell the kernel.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/include/asm/arch-rockchip/grf_rk3368.h |  4 +-
>  arch/arm/mach-rockchip/rk3368/Makefile          |  1 +
>  arch/arm/mach-rockchip/rk3368/sdram_rk3368.c    | 66 +++++++++++++++++++++++++
>  3 files changed, 70 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 5/7] rockchip: dts: rk3328: add dmc node

[Simon Glass]

On 13 June 2017 at 03:30, Kever Yang <kever.yang@rock-chips.com> wrote:
> Add a dmc node for sdram driver.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/dts/rk3328.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 6/7] rockchip: dts: rk3368: add dmc node

[Simon Glass]

On 13 June 2017 at 03:30, Kever Yang <kever.yang@rock-chips.com> wrote:
> Add dmc node to enable sdram driver.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/dts/rk3368.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 7/7] rockchip: correct the bank0 ram size

[Simon Glass]

On 13 June 2017 at 03:30, Kever Yang <kever.yang@rock-chips.com> wrote:
> The bank0 ram size should be the DRAM size minus reserved size,
> the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  board/rockchip/evb_rk3328/evb-rk3328.c            | 2 +-
>  board/rockchip/evb_rk3399/evb-rk3399.c            | 2 +-
>  board/rockchip/sheep_rk3368/sheep_rk3368.c        | 2 +-
>  board/theobroma-systems/puma_rk3399/puma-rk3399.c | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 0/7] rockchip: Split sdram common function into sdram_common.c

[Dr. Philipp Tomsich]

Heiko & Kever,

just a quick update (to avoid any duplication of effort)…

We have implemented DRAM initialisation in UBoot/SPL for the RK3368-uQ7
already, but it will be a few more days before we can provide patches (the SPL
stage is hopelessly large once we MMC support in SPL is enabled … so this
first needs back-to-bootrom working).

The first drop from our side will be 32bits, dual-rank — auto-detection of ranks
and width will come in later, once I receive modified hardware (i.e. (a) with CS1
held high; (b) with half the memory removed for 16bit mode) from my colleagues.

Regards,
Philipp.

> On 13 Jun 2017, at 12:47, Kever Yang <kever.yang@rock-chips.com> wrote:
> 
> Heiko,
> 
> 
> On 06/13/2017 06:04 PM, Heiko Stübner wrote:
>> Am Dienstag, 13. Juni 2017, 11:31:53 CEST schrieb Dr. Philipp Tomsich:
>>> Kever,
>>> 
>>> thanks a lot! I had just started to work on RK3368 SPL code and the DDR
>>> controller would have been next on the list…
>>> You saved me quite a bit of work there.
>> Although the sdram drivers for rk3328 and rk3368 only seem to provide the
>> non-spl portions for now.
>> 
>> Kever, is there a rough time estimate for spl support for these socs?
> 
> No, I would like to provide them ASAP, but I don't get enough hands now :(
> so I decide to make the U-Boot recognize correct DRAM size first which is the
> most important.
>> (Got a rk3328-rock64 sample yesterday, so would be interested on getting
>> a mainline u-boot to run on it)
> 
> You can run mainline u-boot now already, just need to using Rockchip
> loader instead of SPL before U-Boot.
> 
> Thanks,
> - Kever
> 

[U-Boot] [PATCH 3/7] rockchip: rk3328: add sdram driver in U-Boot

[Kever Yang]

Hi Simon,


On 06/17/2017 11:41 AM, Simon Glass wrote:
> On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
>> Add sdram driver in U-Boot for get the correct sdram size from
>> sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
>> to get different dram capability and then tell the kernel.
> Do you think we might be able to retire the Rockchip loader one day?

If the feature and performance is almost the same, then Rockchip loader
is no need any more, and that's what I'm try to do.
- rockcusb & fastboot gadget performance, as I have comment in Eddie's 
patch long
     time ago, the dfu in U-Boot is using single buffer, which is very 
slow compare
     to mass storage gadget.
- Android boot, it's still not have full support for Android image like 
recovery in U-Boot now.
- Secure boot, I have not verify this part on upstream U-Boot, but 
rockchip needs it.
- some other feature used by our product

Thanks,
- Kever
>
>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>> ---
>>
>>   arch/arm/mach-rockchip/rk3328/Makefile       |  1 +
>>   arch/arm/mach-rockchip/rk3328/sdram_rk3328.c | 66 ++++++++++++++++++++++++++++
>>   2 files changed, 67 insertions(+)
>>   create mode 100644 arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
> Reviewed-by: Simon Glass <sjg@chromium.org>
>

[U-Boot] [PATCH 3/7] rockchip: rk3328: add sdram driver in U-Boot

[Simon Glass]

Hi Kever,

On 23 June 2017 at 02:22, Kever Yang <kever.yang@rock-chips.com> wrote:
> Hi Simon,
>
>
> On 06/17/2017 11:41 AM, Simon Glass wrote:
>>
>> On 13 June 2017 at 03:29, Kever Yang <kever.yang@rock-chips.com> wrote:
>>>
>>> Add sdram driver in U-Boot for get the correct sdram size from
>>> sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
>>> to get different dram capability and then tell the kernel.
>>
>> Do you think we might be able to retire the Rockchip loader one day?
>
>
> If the feature and performance is almost the same, then Rockchip loader
> is no need any more, and that's what I'm try to do.
> - rockcusb & fastboot gadget performance, as I have comment in Eddie's patch
> long
>     time ago, the dfu in U-Boot is using single buffer, which is very slow
> compare
>     to mass storage gadget.
> - Android boot, it's still not have full support for Android image like
> recovery in U-Boot now.
> - Secure boot, I have not verify this part on upstream U-Boot, but rockchip
> needs it.
> - some other feature used by our product

OK, good to know the plan, thank you. Hopefully there are no obstacles
to getting all the above features into mainline.

Regards,
Simon